circuit-agent
Server Configuration
Describes the environment variables required to run the server.
| Name | Required | Description | Default |
|---|---|---|---|
No arguments | |||
Instructions
Guidance the server publishes about itself, which clients place ahead of the tool catalog so the model reads it before choosing anything.
This server publishes no instructions, or was last inspected before Glama recorded them.
Capabilities
Features and capabilities supported by this server
Protocol revision2025-11-25
| Capability | Details |
|---|---|
| tools | {
"listChanged": false
} |
| prompts | {
"listChanged": false
} |
| resources | {
"subscribe": false,
"listChanged": false
} |
Tools
Functions exposed to the LLM to take actions
| Name | Description |
|---|---|
| synthesize_circuitA | Synthesize a deterministic hardware netlist and component modules from a natural language prompt. Supported MCUs: STM32F103, ESP32-C3, ESP32-S3, RP2040, STC89C52. Peripherals: Type-C, LDO, Crystal, Buttons, LEDs, Buzzer, I2C, RS485, CAN, TP4056 Battery. |
| search_lcsc_partsA | Query live LCSC / JLCPCB component inventory, stock, package, and pricing with zero API keys required. Features 24-hour disk cache and exponential backoff. |
| list_circuit_blocksB | List all 10 pre-validated CircuitBlocks available in the hardware DSL catalog. |
| validate_netlistC | Validate a hardware netlist dictionary against the formal CircuitAgent JSON Schema specification. |
| calculate_trace_impedanceA | Calculate characteristic impedance (Z0) or differential impedance (Zdiff) for PCB microstrip traces using IPC-2141 / Wheeler equations. Solves exact trace width W and spacing S for target impedance (e.g. 50Ω RF, 90Ω USB, 120Ω RS485/CAN). |
| calculate_bom_costA | Calculate PCBA component cost breakdown and estimate JLCPCB SMT manufacturing surcharges. Identifies Basic library parts (¥0 feeder fee) vs Extended library parts (+¥20/type feeder fee) and suggests cost optimizations. |
Prompts
Interactive templates invoked by user choice
| Name | Description |
|---|---|
| design_hardware_project | End-to-end guided workflow for synthesizing, calculating, and validating an embedded hardware design. |
| audit_schematic_netlist | Senior Principal Electrical Engineer inspection prompt (PI/SI/DFM gates, decoupling rules, differential pairs). |
| optimize_bom_cost | PCBA manufacturing cost-reduction prompt converting Extended parts to Basic parts to save ¥20 feeder fees. |
Resources
Contextual data attached and managed by the client
| Name | Description |
|---|---|
| CircuitAgent Netlist JSON Schema (Draft-07) | Formal JSON Schema specification for hardware netlists, pin connections, modules, and stackups. |
| JLCPCB SMT CPL Standard & Rotation Specification | Standard Cartesian mirror and rotation angle offset specifications for JLC SMT assembly. |
| CircuitBlocks DSL Catalogue | Complete JSON catalogue of all 10 pre-audited hardware circuit blocks with pins, packages, and LCSC part numbers. |
| JLCPCB SMT Engineering Rules & Stackup | Design constraints for JLCPCB manufacturing: JLC04161H 4-layer stackup, clearances, annular rings, and fee structure. |
| Reference Netlist: ESP32-C3 Minimal IoT Node | Complete verified reference netlist for an ESP32-C3 environmental sensor board. |
| Reference Netlist: STM32F103 Industrial Board | Complete verified reference netlist for an STM32F103 industrial controller with Type-C, crystal, and LDO. |
| Reference Netlist: RP2040 High-Density Board | Complete verified reference netlist for an RP2040 dual-core controller with 4-layer stackup constraints. |
TDQS
Scored across 6 tools
Each tool targets a distinct action: generation (synthesize_circuit), catalog listing (list_circuit_blocks), external part lookup (search_lcsc_parts), validation (validate_netlist), cost analysis (calculate_bom_cost), and PCB math (calculate_trace_impedance). Although synthesize/validate/list all deal with netlists, their verbs make the boundary clear.
All six tools follow a clean verb_noun snake_case pattern (synthesize_circuit, search_lcsc_parts, list_circuit_blocks, validate_netlist, calculate_bom_cost, calculate_trace_impedance). No mixed conventions or vague verbs.
Six tools is well-scoped for a hardware netlist synthesis assistant, with each tool covering a distinct stage of the design flow. No redundant or filler tools.
The surface covers synthesis, catalog discovery, part sourcing, validation, cost, and impedance — a coherent pipeline. Minor gaps remain: no netlist editing/update, no schematic or fabrication-format export (e.g. KiCad), and no simulation step.