pcb_create_design_rule

Create a new design rule on the active PCB.

Args: name: Rule name (e.g., "Min Clearance 6mil"). rule_type: Type of rule to create. Options: "clearance" - Electrical clearance (value = gap in mils). "width" - Track width constraint (value = min width in mils; max_value / favored_value optional). "via_size" - Hole size constraint (value = min hole in mils; max_value optional). "differential_pairs" - Differential-pair routing rule (value = min gap, max_value = max gap, favored_value = preferred gap, max_uncoupled_length = max uncoupled length in mils). "solder_mask_expansion" - The mask opening at each pad and via site (value = radial expansion in mils, SIGNED). A negative value contracts the opening, which is how a via ends up covered. Scope it with "IsVia" to tent vias and leave pads alone. "paste_mask_expansion" - Same shape, stencil side (value = radial expansion in mils, signed). "vias_under_smd" - Whether the autorouter may put a via inside an SMD pad. Boolean: set allowed, not value. This is the DRC that catches via-in-pad, which needs filling and capping at fabrication. value: Rule's primary value in mils. For width / via_size / differential_pairs this is the MIN side. Default 10. max_value: For width / via_size / differential_pairs. When supplied, sets the MAX side independently of value. When None, falls back to 5x value (legacy default). favored_value: For width / differential_pairs. Sets the preferred value. Defaults to value when None. max_uncoupled_length: For differential_pairs only. MaxUncoupledLength in mils (single scalar, not per-layer). Defaults to 1000 mils when None. scope: Optional query expression for Scope1. Pick the predicate that matches the rule kind: - net-based rules (clearance, width, via_size): "InNet('GND')", "InNetClass('Power')", "All". - differential_pairs: "InDifferentialPair('USB')", "InDifferentialPairClass('HighSpeed')", "IsDifferentialPair" (matches any diff pair), or "All". Mixing predicates across kinds (e.g., InNet on a differential_pairs rule) creates a rule that never matches. Bracket a comparison joined by And/Or/Xor/Not: "IsPad And (HoleSize > 3)", or use &&/||. Altium binds And tighter than >, and an unbracketed "IsPad And HoleSize > 3" is refused before anything is sent, with the bracketed form in suggested_scope. net_scope: Which nets the rule applies between. Options: "different_nets" (default) for Clearance rules; "any_net" for all-pairs; "same_net" for same-net only. Has no effect on differential_pairs, and none on the mask or vias_under_smd kinds, which are not net-pair rules. allowed: For vias_under_smd only. False forbids a via inside an SMD pad. Omitted means True, which is Altium's own default and creates a rule that changes nothing, rather than one that silently bans via-in-pad board-wide.

Returns: Dictionary with created rule details.

Note: Creating ComponentClearance, HoleToHoleClearance, BoardOutlineClearance, and other newer rule kinds is not supported on this Altium build because the relevant symbolic constants (eRule_ComponentClearance, ...) are not exposed in DelphiScript. Existing rules of those kinds can be UPDATED via pcb_set_rule_properties (gap_mils field), which dispatches through Rule.RuleKind without needing the symbol.