audit_find_bad_connections
Detect dangling PCB track and arc endpoints that are near same-net primitives but not touching, revealing hidden open connections before fabrication.
Instructions
Find PCB tracks / arcs with endpoints that are close to another same-net primitive but don't actually touch.
Walks every track / arc on a signal layer. For each endpoint, looks
for ANOTHER same-net primitive (track / arc / pad / via) within
tolerance_mils. If nothing same-net is in range, the endpoint
is "dangling": Altium may show it as connected in the analyser
(centre-point heuristic) but the photoplot will not bridge it,
producing a real open on the fab side.
Visual review misses these because at 100% zoom the gap is invisible; DRC sometimes catches them under a "Clearance" or "Modified Polygon" rule but not reliably.
Skipped: teardrops (intentionally offset), primitives inside components (they ride the pad), primitives without a net, full circle arcs (no anchor endpoint).
Args: tolerance_mils: Coord tolerance in mils. 0 = exact match required (rare, since router can place tracks on sub-mil grid). Defaults to 1 mil; bump to 5 or 10 to surface gross misalignments only.
Returns:
Dict with:
- checked: track + arc primitives inspected
- violations: primitives with at least one dangling endpoint
- tolerance_mils: echo of the tolerance used
- items: per-violation {kind, layer, net, at} where
at is the dangling endpoint's "(x,y)" in mils
Input Schema
| Name | Required | Description | Default |
|---|---|---|---|
| tolerance_mils | No |
Output Schema
| Name | Required | Description | Default |
|---|---|---|---|
No arguments | |||