design_visual_review
Render the active schematic or PCB to a viewable image and return a layout critique rubric for a visual self-check loop on placement, spacing, and readability.
Instructions
Render the active design and return it as a viewable image plus a critique rubric -- the first step of a visual self-check loop.
SCOPE: layout and placement ONLY -- schematic readability /
spread / flow, PCB part placement, silkscreen, spacing, overlaps.
This is NOT a connectivity or part-correctness review. Do NOT use
it to decide what connects to what, whether a value/rating is
right, or whether a pin is wired -- those come from the netlist +
part data (design_review_snapshot, proj_get_nets,
proj_get_connectivity_many, proj_get_erc_violations), never
from the image. The rubric below is deliberately about geometry;
treat every electrical question as out of scope here.
Renderers are exports; this turns them into feedback. It draws
the active SchDoc or PcbDoc, rasterizes it to PNG (headless Edge)
so you can actually look at it with the Read tool, and returns a
document-specific rubric (what to look for) and
loop_protocol (render -> look -> critique -> cross-check ->
fix -> re-render). Each rubric item names the existing audit
tool(s) that measure it exactly, so vision finds candidates and
the audits confirm and locate them.
Use it as a loop: call this, Read the returned png_path,
critique against rubric, run the named audits for anything
suspicious, fix with the normal tools (for PCB placement,
pcb_plan_placement), then call this again to confirm. A couple
of iterations is usually enough.
Args:
target: "auto" (detect the active document), "schematic",
or "pcb".
output_path: Where to write the SVG (.png sits beside it).
Defaults to the transient <workspace>/renders/ dir; the
scratch .raster.svg used for the screenshot is deleted
automatically (kept out of your folder).
rasterize: Also produce a PNG so the image is directly
viewable (default True). If no browser is found the SVG is
still returned with a rasterize_note.
width: Raster width in pixels (height follows the aspect).
margin_mils: Override the render margin.
layers: PCB only -- restrict to these layer names.
Returns:
Dict with ok, target, doc, svg_path,
png_path (None if rasterization was skipped/failed),
counts, bbox, rubric, loop_protocol,
next_step.
Input Schema
| Name | Required | Description | Default |
|---|---|---|---|
| width | No | ||
| layers | No | ||
| target | No | auto | |
| rasterize | No | ||
| margin_mils | No | ||
| output_path | No |
Output Schema
| Name | Required | Description | Default |
|---|---|---|---|
No arguments | |||