design_add_part
Add a single part to a design plan and wire its pins to named nets in one call, creating or merging nets automatically from a pin-to-net map.
Instructions
Add one part and wire its pins to named nets, in one call.
The atomic authoring primitive under the block/bus tools: place a
single arbitrary part -- an MCU, a connector, a regulator -- and
fold each pin into a net. connections is a pin->net map, the
shape a datasheet pinout reads in; pins that map to the same net
(an IC's five VCC pins) merge onto one net automatically, so you
never hand-maintain a net's pin list. Chain with
design_add_circuit_block (peripherals) and
design_connect_bus (wide interfaces) to author a whole netlist
without writing raw net JSON.
Naming-agnostic: you supply the part identity and net names chosen from the live inventory; this owns only the pin->net folding.
Args:
plan_json: the DesignPlan as a JSON string or dict.
refdes: the new part's designator (must be free in the plan).
lib_ref: its library symbol name.
connections: {pin: net_name} -- a net is created if absent
or merged into if present.
value / footprint / lib_path / sheet / manufacturer / mpn /
datasheet_url / role: standard Part fields.
power_nets / ground_nets: net names to flag power / ground when
this call creates them (an existing net keeps its flags).
net_roles: {net_name: role} for nets created here.
Returns:
{ok, plan, added: {refdes, nets, extended_nets}, notes, validation} -- same shape as design_add_circuit_block.
ok is False on a duplicate refdes / empty connections /
schema error.
Input Schema
| Name | Required | Description | Default |
|---|---|---|---|
| mpn | No | ||
| role | No | ||
| sheet | No | main | |
| value | No | ||
| refdes | Yes | ||
| lib_ref | Yes | ||
| lib_path | No | ||
| footprint | No | ||
| net_roles | No | ||
| plan_json | Yes | ||
| power_nets | No | ||
| connections | Yes | ||
| ground_nets | No | ||
| manufacturer | No | ||
| datasheet_url | No |
Output Schema
| Name | Required | Description | Default |
|---|---|---|---|
No arguments | |||