check_interface
Run design rule checks on the saved interface to identify unplaced pins, I/O standard vs bank voltage mismatches, PLL frequency violations, and clock routing errors.
Instructions
Run the Interface Designer design check (DRC) on the saved design: unplaced pins, I/O standard vs bank voltage mismatches, PLL frequency ranges, clock routing rules, and so on.
Input Schema
| Name | Required | Description | Default |
|---|---|---|---|
| project | Yes |