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generate_ip

Generate custom IP cores for FPGA designs by applying specific parameters, producing HDL source files and Verilog instantiation snippets.

Instructions

Generate a parameterized instance of an IP core. Returns the HDL source files and a ready-to-paste Verilog instantiation snippet with the requested parameter values applied.

Input Schema

TableJSON Schema
NameRequiredDescriptionDefault
nameYesCore name, e.g. 'uart_tx' or 'fifo'
parametersNoParameter overrides, e.g. {"CLKS_PER_BIT": 434}
instance_nameNoVerilog instance name (default: <core_name>_inst)

Implementation Reference

  • Main implementation of generate_ip tool - generates parameterized Verilog instantiation snippets and returns HDL source files for IP cores. Takes core name, parameters, and instance name as inputs, generates a ready-to-paste Verilog instantiation with parameter overrides applied.
    def generate_ip(
        self,
        name: str,
        parameters: dict | None = None,
        instance_name: str | None = None,
    ) -> dict:
        """Return core HDL files plus a Verilog instantiation snippet with the given parameters."""
        core = self.get_core(name)
        if "error" in core:
            return core
    
        manifest_data = core["manifest"]
        params = {**{k: v["default"] for k, v in manifest_data["parameters"].items()}, **(parameters or {})}
        inst   = instance_name or f"{name}_inst"
    
        param_lines = [f"        .{k}({v})" for k, v in params.items()]
        param_block = ""
        if param_lines:
            param_block = " #(\n" + ",\n".join(param_lines) + "\n    )"
    
        port_lines = [f"        .{port}({port})" for port in manifest_data["ports"]]
        port_block = "\n" + ",\n".join(port_lines) + "\n    "
    
        snippet = f"    {name}{param_block} {inst} ({port_block});\n"
    
        return {
            "manifest":        manifest_data,
            "parameters_used": params,
            "instantiation":   snippet,
            "files":           core["files"],
        }
  • server.py:254-276 (registration)
    Tool registration defining the generate_ip MCP tool with JSON schema for input validation. Specifies required 'name' parameter and optional 'parameters' object and 'instance_name' string.
        name="generate_ip",
        description=(
            "Generate a parameterized instance of an IP core. "
            "Returns the HDL source files and a ready-to-paste Verilog instantiation snippet "
            "with the requested parameter values applied."
        ),
        inputSchema={
            "type": "object",
            "properties": {
                "name": {"type": "string", "description": "Core name, e.g. 'uart_tx' or 'fifo'"},
                "parameters": {
                    "type": "object",
                    "description": "Parameter overrides, e.g. {\"CLKS_PER_BIT\": 434}",
                    "additionalProperties": True,
                },
                "instance_name": {
                    "type": "string",
                    "description": "Verilog instance name (default: <core_name>_inst)",
                },
            },
            "required": ["name"],
        },
    ),
  • Pydantic models defining the schema for IP core manifests: ParameterSpec (type, default, description, min/max), PortSpec (direction, width), and CoreManifest (name, version, parameters, ports, files, etc.). Used for validation of IP core data.
    class ParameterSpec(BaseModel):
        type: Literal["integer", "string", "boolean"]
        default: Any
        description: str = ""
        minimum: int | None = None
        maximum: int | None = None
    
    
    class PortSpec(BaseModel):
        direction: Literal["input", "output", "inout"]
        width: int | str          # int or parameter expression e.g. "DATA_WIDTH"
        description: str = ""
    
    
    class CoreManifest(BaseModel):
        name: str
        version: str
        description: str
        author: str
        license: str
        language: Literal["verilog", "systemverilog", "vhdl"]
        category: str
        tags: list[str] = []
        parameters: dict[str, ParameterSpec] = {}
        ports: dict[str, PortSpec] = {}
        files: list[str]
  • Request handler case statement that routes generate_ip tool calls to registry.generate_ip method with extracted arguments (name, parameters, instance_name).
    case "generate_ip":
        result = await asyncio.to_thread(
            registry.generate_ip,
            name=arguments["name"],
            parameters=arguments.get("parameters", {}),
            instance_name=arguments.get("instance_name"),
        )
  • get_core helper method that retrieves IP core manifest and source files. Called by generate_ip to fetch core data before generating the instantiation snippet.
    def get_core(self, name: str) -> dict:
        """Return the full manifest and HDL source for a named core."""
        if name not in self._cache:
            return {"error": f"Core '{name}' not found. Use list_ip_cores to see available cores."}
    
        manifest, core_dir = self._cache[name]
        files: dict[str, str] = {}
        for filename in manifest.files:
            path = core_dir / filename
            if path.exists():
                files[filename] = path.read_text(encoding="utf-8")
            else:
                files[filename] = f"// ERROR: file '{filename}' not found in registry"
    
        return {
            "manifest": self._manifest_dict(manifest),
            "files":    files,
        }

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