pcb_analyze_clock_emi
Calculate clock harmonic EMI envelope and predict emission levels against FCC/CISPR limits, including spread-spectrum clocking reduction.
Instructions
Calculate clock signal harmonic EMI envelope using trapezoidal waveform Fourier analysis. Predicts emission levels vs FCC/CISPR limits. Includes spread-spectrum clocking reduction.
Input Schema
| Name | Required | Description | Default |
|---|---|---|---|
| duty_cycle | No | Duty cycle 0-1. Default 0.5 | |
| ssc_enabled | No | Spread-spectrum clocking active. Default false | |
| rise_time_ns | No | Signal rise time 10-90% (ns). Default 1.0 | |
| num_harmonics | No | Number of harmonics to compute. Default 20 | |
| limit_standard | No | Emission limit standard. Default fcc_classb | |
| trace_length_mm | No | Clock trace length (mm). Default 50 | |
| voltage_swing_v | No | Peak voltage swing (V). Default 3.3 | |
| clock_frequency_mhz | Yes | Fundamental clock frequency (MHz) | |
| ssc_deviation_percent | No | SSC frequency deviation %. Default 0.5 |