create_bd_port
Creates top-level block design ports—scalar, vector, or interface—so you can expose signals and align port names with board XDC constraints.
Instructions
Create a top-level port on the current block design. Scalar or vector (from/to) via create_bd_port, or an interface port when vlnv is given (create_bd_intf_port, e.g. the XADC 'xilinx.com:interface:diff_analog_io_rtl:1.0'). Port names must match the constraints (XDC) of the board.
Input Schema
| Name | Required | Description | Default |
|---|---|---|---|
| to | No | LSB index for a vector port (default: 0) | |
| from | No | MSB index for a vector port (e.g. 7) | |
| mode | No | Interface mode (default: Slave): Master, Slave, ... | |
| name | Yes | Port name (e.g. 'led_o') | |
| type | No | Optional port type: clk, rst, ce, intr, data, undef | |
| vlnv | No | Interface VLNV: creates an interface port instead | |
| direction | No | Direction for a plain port (default: I) |