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load_intent

Destructive

Makes source-intent data available for get_intent after a SystemVerilog load that omitted intent, re-elaborating from captured files or flist.

Instructions

Make the warm source-intent layer available for get_intent. Use after a SystemVerilog load that did not retain intent; do not call for VHDL or gate-level Verilog, and prefer load_systemverilog(intent=True) on the initial load. This is a no-op when the link is already live; otherwise it replaces the active universe by re-elaborating from explicit or captured flist/files. Returns intent_loaded; missing inputs produce a structured error.

Input Schema

TableJSON Schema
NameRequiredDescriptionDefault
topNoTop module name; omit to reuse the captured or inferred top.
filesNoSystemVerilog source paths; omit to reuse captured load inputs.
flistNoSystemVerilog file-list path; omit to reuse captured load inputs.

Schema Changelog

Changes observed during successful MCP inspections.

  1. Changed3 schema fields changedv0.1.9
    • addedInput schema / properties / files / description
      Added value: +"SystemVerilog source paths; omit to reuse captured load inputs."
    • addedInput schema / properties / flist / description
      Added value: +"SystemVerilog file-list path; omit to reuse captured load inputs."
    • addedInput schema / properties / top / description
      Added value: +"Top module name; omit to reuse the captured or inferred top."
  2. First observedv0.1.8

TDQS

A4.7/5.0
Behavior5/5

Does the description disclose side effects, auth requirements, rate limits, or destructive behavior?

Annotations declare destructiveHint=true, and the description goes further by naming what is destroyed: 'it replaces the active universe by re-elaborating from explicit or captured flist/files.' It also discloses the idempotency-like no-op path when the link is already live, the return value (intent_loaded), and the error behavior for missing inputs.

Agents need to know what a tool does to the world before calling it. Descriptions should go beyond structured annotations to explain consequences.

Conciseness5/5

Is the description appropriately sized, front-loaded, and free of redundancy?

Front-loads the purpose, then the precondition, exclusions, alternative, and side effects in five tight sentences with no filler. Every clause carries actionable information.

Shorter descriptions cost fewer tokens and are easier for agents to parse. Every sentence should earn its place.

Completeness5/5

Given the tool's complexity, does the description cover enough for an agent to succeed on first attempt?

For a 3-parameter mutation tool with no output schema, the description covers preconditions, exclusions, the destructive replace-the-universe side effect, the reuse behavior of omitted params, and the return/error signals. Nothing an agent needs to call it correctly is missing.

Complex tools with many parameters or behaviors need more documentation. Simple tools need less. This dimension scales expectations accordingly.

Parameters3/5

Does the description clarify parameter syntax, constraints, interactions, or defaults beyond what the schema provides?

Schema description coverage is 100%, so top/files/flist are already documented with their reuse semantics. The description only echoes the 'explicit or captured flist/files' concept without adding format or precedence detail beyond the schema; baseline 3 is appropriate.

Input schemas describe structure but not intent. Descriptions should explain non-obvious parameter relationships and valid value ranges.

Purpose5/5

Does the description clearly state what the tool does and how it differs from similar tools?

States a specific verb+resource: makes the warm source-intent layer available for get_intent. It explicitly names the sibling alternative (load_systemverilog(intent=True)) and the case it serves, so an agent can distinguish it from the load_* family without opening schemas.

Agents choose between tools based on descriptions. A clear purpose with a specific verb and resource helps agents select the right tool.

Usage Guidelines5/5

Does the description explain when to use this tool, when not to, or what alternatives exist?

Gives explicit when (after a SystemVerilog load that did not retain intent), when-not (VHDL or gate-level Verilog), and the preferred alternative on initial load (load_systemverilog(intent=True)). All routing conditions are stated rather than implied.

Agents often have multiple tools that could apply. Explicit usage guidance like "use X instead of Y when Z" prevents misuse.