verilog_lint
Lint Verilog/SystemVerilog source files with Verible and return structured line, column, severity, and rule diagnostics to catch errors early.
Instructions
Lints Verilog / SystemVerilog source files using verible-verilog-lint and returns structured line, column, severity, and rule diagnostics.
Input Schema
| Name | Required | Description | Default |
|---|---|---|---|
| cwd | No | Optional working directory where the files reside. | |
| files | Yes | List of Verilog/SystemVerilog source files to lint (relative to cwd or absolute). | |
| ruleset | No | Optional Verible ruleset name (e.g. 'all', 'default'). |