design_framework
Synthesize a deterministic FrameworkPlan from an imported netlist: enable clocks, mux pins, and emit peripheral HAL init blocks in dependency order.
Instructions
Synthesize a deterministic FrameworkPlan (Pillar D) from the session's imported board: which clocks to enable, how each pin must be muxed, and which peripheral init blocks to emit, in dependency order. Supply per-peripheral HAL .Init parameters via design={'USART1': {'baud': 115200, ...}} and optional AF numbers via af_map. Mandatory .Init members are auto-filled with HAL-standard defaults (a complete, valid init struct, not a half-initialized one) and a few are derived from the netlist (UART flow control from RTS/CTS pins, SPI NSS from an NSS pin); each field is tagged explicit/derived/default. Alternate-function numbers are also auto-derived from a pin-capability DB (db_path or the STM32_GDB_MCP_PIN_DB env) when its entries carry an 'af' field; an explicit af_map overrides the DB per pin. Anything that needs a human decision (baud, timer period, I2C timing) is surfaced as unresolved, never guessed. Import a netlist first (import_netlist).
Input Schema
| Name | Required | Description | Default |
|---|---|---|---|
| af_map | No | Optional alternate-function numbers: {line_or_family: {port_pin: {'USART1_TX': 7}}}. Overrides db_path per pin. | |
| design | No | Per-peripheral config, e.g. {'USART1': {'baud': 115200, 'word_length': 'UART_WORDLENGTH_8B'}}. | |
| db_path | No | Optional JSON pin-capability DB (CubeMX-derived); entries with an 'af' field auto-fill alternate-function numbers. | |
| session | No | Target session id (default 'default'). | |
| from_spec | No | Build from the session's imported product spec (import_spec) instead of, or merged under, an explicit design (explicit keys win). |