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design_framework

Synthesize a deterministic FrameworkPlan from an imported netlist: enable clocks, mux pins, and emit peripheral HAL init blocks in dependency order.

Instructions

Synthesize a deterministic FrameworkPlan (Pillar D) from the session's imported board: which clocks to enable, how each pin must be muxed, and which peripheral init blocks to emit, in dependency order. Supply per-peripheral HAL .Init parameters via design={'USART1': {'baud': 115200, ...}} and optional AF numbers via af_map. Mandatory .Init members are auto-filled with HAL-standard defaults (a complete, valid init struct, not a half-initialized one) and a few are derived from the netlist (UART flow control from RTS/CTS pins, SPI NSS from an NSS pin); each field is tagged explicit/derived/default. Alternate-function numbers are also auto-derived from a pin-capability DB (db_path or the STM32_GDB_MCP_PIN_DB env) when its entries carry an 'af' field; an explicit af_map overrides the DB per pin. Anything that needs a human decision (baud, timer period, I2C timing) is surfaced as unresolved, never guessed. Import a netlist first (import_netlist).

Input Schema

TableJSON Schema
NameRequiredDescriptionDefault
af_mapNoOptional alternate-function numbers: {line_or_family: {port_pin: {'USART1_TX': 7}}}. Overrides db_path per pin.
designNoPer-peripheral config, e.g. {'USART1': {'baud': 115200, 'word_length': 'UART_WORDLENGTH_8B'}}.
db_pathNoOptional JSON pin-capability DB (CubeMX-derived); entries with an 'af' field auto-fill alternate-function numbers.
sessionNoTarget session id (default 'default').
from_specNoBuild from the session's imported product spec (import_spec) instead of, or merged under, an explicit design (explicit keys win).

Schema Changelog

Changes observed during successful MCP inspections.

  1. First observedv0.15.1

TDQS

A4.6/5.0
Behavior5/5

Does the description disclose side effects, auth requirements, rate limits, or destructive behavior?

Far beyond the annotations, it discloses auto-fill of mandatory .Init members with HAL defaults, derivation from the netlist (UART flow control, SPI NSS), explicit/derived/default tagging per field, AF auto-derivation from a pin DB, and precedence rules (explicit af_map overrides DB). It also states the safety-relevant policy that ambiguous fields are surfaced as unresolved rather than guessed.

Agents need to know what a tool does to the world before calling it. Descriptions should go beyond structured annotations to explain consequences.

Conciseness4/5

Is the description appropriately sized, front-loaded, and free of redundancy?

The purpose and output list are front-loaded in the first sentence, and each following sentence carries distinct information (parameter shapes, defaults, derivation, precedence). It is dense and slightly long, but no sentence is filler.

Shorter descriptions cost fewer tokens and are easier for agents to parse. Every sentence should earn its place.

Completeness5/5

Given the tool's complexity, does the description cover enough for an agent to succeed on first attempt?

For a five-parameter, nested-object tool with no output schema, the description covers purpose, prerequisites, parameter semantics, behavioral rules, and the shape of the produced plan (clocks, muxing, init blocks in dependency order). An agent has everything needed to invoke it correctly.

Complex tools with many parameters or behaviors need more documentation. Simple tools need less. This dimension scales expectations accordingly.

Parameters4/5

Does the description clarify parameter syntax, constraints, interactions, or defaults beyond what the schema provides?

Schema coverage is 100%, so the schema already documents all five parameters; the baseline is 3. The description adds genuine value on top, documenting the design and af_map shapes, the STM32_GDB_MCP_PIN_DB env fallback for db_path, and the merge/precedence semantics of from_spec.

Input schemas describe structure but not intent. Descriptions should explain non-obvious parameter relationships and valid value ranges.

Purpose5/5

Does the description clearly state what the tool does and how it differs from similar tools?

The description names a specific verb (Synthesize), resource (FrameworkPlan / Pillar D), and concrete outputs (clocks to enable, pin muxing, peripheral init blocks in dependency order), so an agent knows exactly what the tool produces. It also ties itself to the sibling import_netlist as a prerequisite, anchoring it in the workflow.

Agents choose between tools based on descriptions. A clear purpose with a specific verb and resource helps agents select the right tool.

Usage Guidelines4/5

Does the description explain when to use this tool, when not to, or what alternatives exist?

It clearly states the precondition ('Import a netlist first') and explains when to supply design/af_map versus relying on auto-fill, and how from_spec merges with explicit design. It does not explicitly contrast with sibling tools like describe_framework or render_framework, so routing between those is left to inference.

Agents often have multiple tools that could apply. Explicit usage guidance like "use X instead of Y when Z" prevents misuse.