create_project
Create a Vivado project from existing design, constraint, and simulation files. Specify part, top module, and file groups to generate a ready-to-use project for synthesis and simulation.
Instructions
Create a Vivado project from existing design, constraint, and simulation files.
Input Schema
| Name | Required | Description | Default |
|---|---|---|---|
| top | Yes | ||
| part | Yes | ||
| force | No | ||
| defines | No | ||
| rtl_files | Yes | ||
| sim_files | No | ||
| simulator | No | ||
| timeout_s | No | ||
| xdc_files | No | ||
| file_specs | No | ||
| project_dir | Yes | ||
| include_dirs | No | ||
| project_name | Yes | ||
| testbench_top | No | ||
| source_defines | No | ||
| target_language | No | ||
| source_include_dirs | No |
Output Schema
| Name | Required | Description | Default |
|---|---|---|---|
| ok | Yes | ||
| data | Yes | ||
| tool | Yes | ||
| message | Yes | ||
| summary | Yes | ||
| error_code | Yes | ||
| next_steps | No | ||
| raw_excerpt | No | ||
| next_actions | No | ||
| handoff_ready | Yes | ||
| stop_required | Yes | ||
| policy_allowed | No | ||
| resume_context | No | ||
| schema_version | Yes | ||
| assessment_status | Yes | ||
| handoff_reviewable | No | ||
| hardware_validation | No |