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retroarch_write_ram

Write bytes to emulated memory via the CHEEVOS address space when cores lack a memory map. Fallback write tool; verify with retroarch_read_ram because the command returns no acknowledgment.

Instructions

PURPOSE: Write a byte sequence to emulated memory via the achievement (CHEEVOS) address space (WRITE_CORE_RAM). USAGE: Fallback memory-write tool — use when retroarch_write_memory returns 'no memory map defined' or the core only supports the older CHEEVOS write API. Maximum 4096 bytes per call (NCI line-length limit). To verify the write landed (this command does NOT acknowledge — see BEHAVIOR), follow up with retroarch_read_ram at the same address. To establish a rollback point first, use retroarch_save_state_current. BEHAVIOR: DESTRUCTIVE: overwrites bytes starting at address with no undo (snapshot via retroarch_save_state_current first if you need rollback). Disables RetroArch's hardcore mode for the rest of the session. FIRE-AND-FORGET: the NCI does NOT acknowledge this command — the call returns as soon as the UDP datagram is sent, with no confirmation that RetroArch received or applied it. To verify the effect, follow up with an observable tool (retroarch_get_status for run state, retroarch_read_memory / retroarch_read_ram for memory mutations, retroarch_screenshot for visual state). UDP packets to a not-listening RetroArch are silently dropped. This is the key behavioral difference vs retroarch_write_memory, which DOES return a count: write_ram has no way to report a partial write or a rejected address — the only way to verify is a follow-up retroarch_read_ram. Direct memory write — bypasses MBC/mapper/DMA semantics. Transport: RetroArch's Network Control Interface (NCI) over UDP (default 127.0.0.1:55355, requires network_cmd_enable = true in retroarch.cfg). Local input validation rejects empty arrays, > 4096 bytes, or values outside 0-255 before the UDP send.

RetroArch exposes TWO distinct memory APIs with different address spaces: • READ_CORE_MEMORY / WRITE_CORE_MEMORY (used by retroarch_read_memory / retroarch_write_memory): goes through the libretro core's system memory map. Preferred when the loaded core advertises a memory map (most modern cores do). Errors with 'no memory map defined' if the loaded core doesn't. • READ_CORE_RAM / WRITE_CORE_RAM (used by retroarch_read_ram / retroarch_write_ram): uses the achievement (CHEEVOS) address space. Works even when no core memory map is defined, but addresses follow CHEEVOS conventions, not the system bus. Use as a fallback when read_memory returns 'no memory map defined'. Both APIs depend on the loaded core's exposed mapping — addresses you used on a different core / system will NOT carry over.

RETURNS: Single line 'Wrote N bytes → ADDR_HEX (CHEEVOS, no ack)' where N is the array length you sent. The 'no ack' in the message is a reminder that RetroArch did not confirm the write.

Input Schema

TableJSON Schema
NameRequiredDescriptionDefault
bytesYesByte values to write, one per element (each 0-255). Length 1-4096 (hard cap from RetroArch's NCI single-datagram size). Written sequentially from `address`. Because RetroArch does not acknowledge this command, partial / rejected writes cannot be distinguished from successful ones at the protocol level.
addressYesStarting address in the CHEEVOS (achievements) address space — distinct from the libretro system memory map used by retroarch_write_memory. See retroarch_read_ram for address-space caveats. Bytes are written sequentially address, address+1, ...
Behavior5/5

Does the description disclose side effects, auth requirements, rate limits, or destructive behavior?

With no annotations provided, the description carries the full burden and excels. It discloses destructive overwrites with no undo, hardcore-mode disabling, fire-and-forget semantics with no acknowledgment, silent UDP drops, input validation limits, and bypassing of MBC/mapper/DMA semantics. This level of behavioral disclosure is exceptional.

Agents need to know what a tool does to the world before calling it. Descriptions should go beyond structured annotations to explain consequences.

Conciseness4/5

Is the description appropriately sized, front-loaded, and free of redundancy?

The description is long but well-structured with clear PURPOSE, USAGE, BEHAVIOR, and RETURNS sections, plus a bulleted comparison of the two memory APIs. It is appropriately detailed for a complex tool. Minor redundancy in repeating 'no ack' in multiple places costs a point, but overall it earns its length.

Shorter descriptions cost fewer tokens and are easier for agents to parse. Every sentence should earn its place.

Completeness5/5

Given the tool's complexity, does the description cover enough for an agent to succeed on first attempt?

Given the tool's complexity, no output schema, and no annotations, the description is remarkably complete. It covers purpose, alternatives, behavioral caveats, transport requirements, input validation, return format, and verification strategies. It even notes the two distinct memory APIs and address-space non-portability across cores, leaving no critical gap.

Complex tools with many parameters or behaviors need more documentation. Simple tools need less. This dimension scales expectations accordingly.

Parameters5/5

Does the description clarify parameter syntax, constraints, interactions, or defaults beyond what the schema provides?

Schema coverage is 100%, but the description adds substantial meaning beyond the schema: the 4096-byte NCI line-length cap, the distinct CHEEVOS address-space interpretation, sequential write ordering, and the implication of no acknowledgment for partial writes. It also clarifies that `bytes` length maps to the protocol limit and that `address` follows CHEEVOS conventions.

Input schemas describe structure but not intent. Descriptions should explain non-obvious parameter relationships and valid value ranges.

Purpose5/5

Does the description clearly state what the tool does and how it differs from similar tools?

The description opens with a specific verb and resource: 'Write a byte sequence to emulated memory via the achievement (CHEEVOS) address space (WRITE_CORE_RAM).' It clearly distinguishes itself from the sibling retroarch_write_memory by naming the CHEEVOS address space and its role as a fallback, making the tool's purpose unambiguous.

Agents choose between tools based on descriptions. A clear purpose with a specific verb and resource helps agents select the right tool.

Usage Guidelines5/5

Does the description explain when to use this tool, when not to, or what alternatives exist?

The description explicitly states when to use this tool: 'use when retroarch_write_memory returns no memory map defined or the core only supports the older CHEEVOS write API.' It also contrasts the two memory APIs, advises using retroarch_save_state_current for a rollback point, and explains when to follow up with other tools. This is exemplary usage guidance.

Agents often have multiple tools that could apply. Explicit usage guidance like "use X instead of Y when Z" prevents misuse.

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