logisim_check
Checks Logisim circuits for wiring faults like floating nets, shorts, and bit mismatches, then simulates to find conflicts and undefined outputs.
Instructions
Find wiring mistakes in a circuit: unconnected inputs, floating nets, several outputs on one net (often an accidental short), wires passing straight through a port or drawn on top of each other (Logisim connects those), loose wire ends, bit width mismatches, lonely tunnels, overlapping parts; then simulate it (all input combinations when small) to find conflicts (E), undefined outputs (x) and oscillation.
Input Schema
| Name | Required | Description | Default |
|---|---|---|---|
| path | Yes | Path to the .circ file (absolute, or relative to the working folder) | |
| circuit | No | Circuit inside the file (default: the main circuit) | |
| simulate | No | Also run the simulation checks (default true) |