logisim_build_logic
Synthesize a combinational circuit from Boolean formulas or a truth table in a chosen gate basis, draw it to a .circ file, and verify it by simulating all input combinations.
Instructions
Synthesize a combinational circuit from Boolean formulas or a truth table, in a chosen gate basis, then draw it (like logisim_build) and verify it by simulating every input combination.
outputs: {"F": "A & ~B | C", "G": "A ^ B ^ C"}; formula syntax: & * · ∧ AND, | + ∨ OR, ~ ! ¬ NOT or postfix ', ^ ⊕ XOR, ↑ NAND, ↓ NOR, -> → implication, <-> == ≡ equivalence, 0/1, parentheses. An output can instead be {"minterms": [1, 3, 7], "dont_care": [5]} (then 'inputs' is required; inputs[0] is the most significant bit). truth_table: alternative to outputs, text like "A B C | F G\n0 0 0 | 0 1\n..." (x or - = don't care, missing rows = don't care). form: as_written (formulas only; default for formulas), min_sop (minimal DNF; default for tables/minterms), min_pos (minimal CNF), sop_canonical (perfect DNF), pos_canonical (perfect CNF). basis: any (default), and_or_not, nand (NAND only), nor (NOR only). max_inputs: gate fan-in limit (default 4; 2 = two-input gates).
Input Schema
| Name | Required | Description | Default |
|---|---|---|---|
| form | No | ||
| path | Yes | Path to the .circ file (absolute, or relative to the working folder) | |
| basis | No | ||
| scale | No | Image scale (default 1.5, reduced automatically for large circuits) | |
| title | No | ||
| inputs | No | Input order (default: variables sorted A, B, C / x1, x2 ...) | |
| render | No | Return a picture (default true) | |
| outputs | No | ||
| overwrite | No | Replace the file if it already exists (default false) | |
| max_inputs | No | ||
| truth_table | No |