logisim
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- AlicenseBqualityCmaintenanceEnables an AI to build, inspect, test, and render logic circuits as .dig files, then open them in the Digital app.10GPL 3.0
- AlicenseNot gradedqualityBmaintenanceEnables AI agents to build, wire, inspect and simulate digital circuits directly in a running Logisim Evolution window, with every edit appearing live and undoable. Agents work from exact ports, real netlists and truth tables rather than screenshots, and can verify designs through simulation.MIT
- AlicenseNot gradedqualityBmaintenanceEnables Claude to create and modify real Onshape CAD models — sketches, extrudes, fillets, patterns, mates, and parametric variables — with every mutation returning structured status, warnings, and geometric deltas. Includes multi-view PNG rendering, image-reference decomposition, and drawing OCR so the agent can visually verify and iterate on parts and assemblies.MIT
- AlicenseAqualityCmaintenanceEnables Claude to control AutoCAD—draw, edit, query, layers, blocks, annotations, screenshots, plot to PDF—using plain language.86MIT
- FlicenseNot gradedqualityCmaintenanceEnables natural language interaction with Cadence Virtuoso SKILL via Claude Code, allowing users to load files, evaluate expressions, inspect forms, and read CIW errors.-
- AlicenseNot gradedqualityBmaintenanceEnables an LLM agent to assemble, wire, run, fault and observe electromechanical motor-control circuits through 26 tools covering component placement, terminal connections, button/switch operation, fault injection, and simulation control. Also lets agents load and save circuits and generate PDF drawing sets, screenshots and scripted demo videos.MIT
TDQS
Scored across 9 tools
Most tools are distinct (components, build, inspect, check, render), but logisim_verify, logisim_truth_table, and logisim_simulate all overlap heavily on simulation. logisim_verify explicitly accepts a truth_table mode and a sequence mode, duplicating what the dedicated truth_table and simulate tools do, which invites misselection.
All tools share a consistent logisim_ prefix and snake_case. The pattern is mostly verb/noun (build, verify, inspect, check, render) with a couple of compound noun_phrases (build_logic, truth_table), a minor deviation that remains readable and predictable.
Nine tools is well-scoped for a circuit design/verification server. Each tool maps to a meaningful stage (discover, build, inspect, check, verify, simulate, render) without obvious filler.
The surface covers the full lifecycle: component discovery, building, logic synthesis, inspection, error checking, verification, simulation, and rendering. The only minor gap is that modifying an existing hand-drawn circuit requires re-building with overwrite rather than a dedicated edit operation.