Enables automated generation of FreeRTOS embedded projects for chips like BK7252, STM32F4, and ESP32. Provides intelligent project structure creation, peripheral driver code generation, and complete embedded development workflows through natural language interaction.
An MCP server for Nordic nRF Connect SDK development that enables users to list, read, and search documentation and sample code from the nrfconnect/sdk-nrf repository. It provides Claude with specialized tools to navigate SDK resources, source files, and configuration examples directly through the GitHub API.
An MCP server for source-grounded, page-cited evidence retrieval tailored for embedded and firmware development, returning verbatim snippets with exact citations or 'no match' to prevent fabrications.
Enables AI agents to control serial port devices (modems, instruments, embedded boards) via MCP tools for listing ports, connecting, and sending/receiving commands.
An MCP server that provides AI coding assistants with access to official ARM CMSIS SVD hardware register definitions for microcontrollers. It enables precise querying of register names, bit positions, and addresses to prevent hallucinations during embedded systems development.
An MCP server for the Pebble smartwatch ecosystem, offering appstore search, a 64-color design toolkit, and build-emulator-screenshot development workflows as typed tools.
A Model Context Protocol (MCP) server for ROS 2 that enables GitHub Copilot and other AI agents to interact with ROS 2 systems. This server provides tools for monitoring, debugging, and managing ROS 2 nodes, topics, services, and TF2 frames.
All-in-one developer tool and MCP Server for Roku development, featuring ECP device control, automated channel sideloading, BrightScript debugging, and real-time log monitoring.
A read-only MCP server for AI agents to understand KiCad projects through progressive disclosure, providing compact summaries and drill-down tools for components, nets, traces, and ERC/DRC checks without blowing context budgets.
Enables AI assistants to interact with STM32 development boards via J-Link debugger using RTT communication, supporting connection, logging, memory operations, and firmware flashing through natural language.
Provides AI assistants with a complete FPGA toolchain for HDL linting, simulation, synthesis, and place-and-route across various hardware targets. It features a GitHub-backed IP core registry that enables users to search for and import MIT-licensed cores directly through their chat interface.
A minimal MCP server that provides 25 tools and 5 hooks to control Xilinx Vivado EDA for FPGA development, including session management, Tcl execution, smart diagnostics, and IP debugging.
Enables MCP-capable agents to execute boardless AMD Vivado Project Mode PL development flows through safe, policy-constrained tools while preserving diagnostic and reproducible project evidence.