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ssql2014
by ssql2014

verilator_testbenchgenerator

Generate testbenches for Verilog/SystemVerilog modules with automatic stimulus generation, protocol support, and coverage analysis.

Instructions

Generate intelligent testbenches for Verilog/SystemVerilog modules with automatic stimulus generation

Input Schema

TableJSON Schema
NameRequiredDescriptionDefault
protocolNoProtocol type for protocol-aware testbench
templateNoTestbench template stylebasic
parseOnlyNoOnly parse module, don't generate testbench
outputFileNoOutput testbench file path
targetFileYesVerilog file containing the module to test
clockPeriodNoClock period in time units
stimulusTypeNoType of stimulus to generatedirected
targetModuleYesModule name to generate testbench for
resetDurationNoReset duration in time units
simulationTimeNoTotal simulation time
generateCheckersNoGenerate response checkers
generateCoverageNoGenerate coverage points
generateAssertionsNoGenerate assertions
Behavior3/5

Does the description disclose side effects, auth requirements, rate limits, or destructive behavior?

No annotations are provided, so the description must carry the full burden. It mentions 'intelligent' and 'automatic' stimulus generation but does not disclose behaviors like overwriting files, dependencies, or side effects. Some behavioral traits (e.g., generating checkers) are only implied via parameters.

Agents need to know what a tool does to the world before calling it. Descriptions should go beyond structured annotations to explain consequences.

Conciseness4/5

Is the description appropriately sized, front-loaded, and free of redundancy?

The description is a single concise sentence that front-loads the key action. It is appropriately sized but could include more structure (e.g., a brief list of capabilities). No redundant information.

Shorter descriptions cost fewer tokens and are easier for agents to parse. Every sentence should earn its place.

Completeness2/5

Given the tool's complexity, does the description cover enough for an agent to succeed on first attempt?

Given the tool has 13 parameters, no output schema, and no annotations, the description is too high-level. It does not explain return values, file creation, error handling, or what constitutes a successful generation. The complexity demands more completeness.

Complex tools with many parameters or behaviors need more documentation. Simple tools need less. This dimension scales expectations accordingly.

Parameters3/5

Does the description clarify parameter syntax, constraints, interactions, or defaults beyond what the schema provides?

Schema description coverage is 100%, so baseline is 3. The description adds no additional meaning beyond parameter names and types. It does not explain relationships or constraints among parameters.

Input schemas describe structure but not intent. Descriptions should explain non-obvious parameter relationships and valid value ranges.

Purpose5/5

Does the description clearly state what the tool does and how it differs from similar tools?

The description clearly states the tool generates testbenches for Verilog/SystemVerilog modules with automatic stimulus generation, and the verb 'generate' and resource 'testbenches' are specific. It effectively distinguishes from siblings like compile, simulate, and natural language.

Agents choose between tools based on descriptions. A clear purpose with a specific verb and resource helps agents select the right tool.

Usage Guidelines3/5

Does the description explain when to use this tool, when not to, or what alternatives exist?

While the description implies use when needing testbenches, it provides no explicit guidance on when to use this tool vs alternatives like verilator_compile or verilator_simulate. No when-not-to-use or exclusion criteria are given.

Agents often have multiple tools that could apply. Explicit usage guidance like "use X instead of Y when Z" prevents misuse.

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