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by kfy123bot

synthesize_verilog

Convert Verilog hardware description code into optimized gate-level netlists for FPGA implementation using synthesis tools.

Instructions

Synthesize Verilog code using Yosys for various FPGA targets

Input Schema

TableJSON Schema
NameRequiredDescriptionDefault
verilog_codeYesThe Verilog source code to synthesize
top_moduleYesName of the top-level module
targetNoTarget technology (generic, ice40, xilinx, intel)generic
Behavior2/5

Does the description disclose side effects, auth requirements, rate limits, or destructive behavior?

No annotations are provided, so the description carries full burden. It mentions the synthesis tool (Yosys) and target types, but doesn't disclose behavioral traits like whether it's read-only or destructive, expected runtime, output format, error handling, or resource requirements. For a synthesis tool with zero annotation coverage, this leaves significant gaps in understanding its operation.

Agents need to know what a tool does to the world before calling it. Descriptions should go beyond structured annotations to explain consequences.

Conciseness5/5

Is the description appropriately sized, front-loaded, and free of redundancy?

The description is a single, efficient sentence with zero waste. It's front-loaded with the core purpose and includes key details (tool and target scope) without unnecessary elaboration. Every word earns its place, making it highly concise and well-structured.

Shorter descriptions cost fewer tokens and are easier for agents to parse. Every sentence should earn its place.

Completeness2/5

Given the tool's complexity, does the description cover enough for an agent to succeed on first attempt?

Given the complexity of synthesis (a non-trivial EDA operation), no annotations, and no output schema, the description is incomplete. It doesn't cover what the tool returns (e.g., netlist, reports), success/failure conditions, or integration with sibling tools. For a tool with 3 parameters and significant behavioral implications, more context is needed to be fully helpful.

Complex tools with many parameters or behaviors need more documentation. Simple tools need less. This dimension scales expectations accordingly.

Parameters3/5

Does the description clarify parameter syntax, constraints, interactions, or defaults beyond what the schema provides?

Schema description coverage is 100%, so the schema fully documents all three parameters. The description adds no additional meaning beyond what's in the schema—it doesn't explain parameter interactions, default behaviors, or usage examples. Baseline 3 is appropriate when the schema does the heavy lifting, but the description doesn't compensate or enhance understanding.

Input schemas describe structure but not intent. Descriptions should explain non-obvious parameter relationships and valid value ranges.

Purpose4/5

Does the description clearly state what the tool does and how it differs from similar tools?

The description clearly states the action ('Synthesize') and resource ('Verilog code'), and specifies the tool used ('Yosys') and target scope ('various FPGA targets'). It distinguishes from siblings like simulate_verilog or run_openlane by focusing on synthesis rather than simulation or full flows. However, it doesn't explicitly differentiate from potential overlapping tools beyond the sibling list provided.

Agents choose between tools based on descriptions. A clear purpose with a specific verb and resource helps agents select the right tool.

Usage Guidelines2/5

Does the description explain when to use this tool, when not to, or what alternatives exist?

The description provides no guidance on when to use this tool versus alternatives. It doesn't mention prerequisites, when not to use it, or compare it to sibling tools like simulate_verilog (for verification) or run_openlane (for full implementation). Usage is implied by the purpose but lacks explicit contextual boundaries.

Agents often have multiple tools that could apply. Explicit usage guidance like "use X instead of Y when Z" prevents misuse.

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