stm32_board_info

Does the description disclose side effects, auth requirements, rate limits, or destructive behavior?

With no annotations, the description must carry the behavioral burden. It does disclose the transport (connects via SWD) and the read-only nature of the call, but says nothing about failure modes when no board is attached, whether it claims the probe and conflicts with an active debug session, or any permission/state requirements.

Agents need to know what a tool does to the world before calling it. Descriptions should go beyond structured annotations to explain consequences.

Is the description appropriately sized, front-loaded, and free of redundancy?

Purpose is front-loaded in the first sentence and the Args block earns its place by defining the identifier forms. The Returns block largely restates the info list already given in the opening sentence and is redundant given an output schema exists.

Shorter descriptions cost fewer tokens and are easier for agents to parse. Every sentence should earn its place.

Given the tool's complexity, does the description cover enough for an agent to succeed on first attempt?

For a single optional parameter tool with an output schema, this covers purpose, identifier formats, and when to call it. The missing piece is behavior on connection failure or probe contention, which matters for an SWD-attaching tool with no annotations.

Complex tools with many parameters or behaviors need more documentation. Simple tools need less. This dimension scales expectations accordingly.

Does the description clarify parameter syntax, constraints, interactions, or defaults beyond what the schema provides?

Schema description coverage is 0%, but the description compensates by explaining that `probe` accepts a board nickname, a probe nickname, or an ST-Link serial number to target a specific board. The only gap is that it does not state what happens when `probe` is omitted (the default empty string).

Input schemas describe structure but not intent. Descriptions should explain non-obvious parameter relationships and valid value ranges.

Does the description clearly state what the tool does and how it differs from similar tools?

States a specific verb and resource (read board info over ST-Link/SWD) and enumerates exactly what is retrieved: ST-LINK version, voltage, CPU type, flash size. It is clearly distinguishable from siblings like stm32_list_probes or debug_status, though it never names an alternative explicitly.

Agents choose between tools based on descriptions. A clear purpose with a specific verb and resource helps agents select the right tool.

Does the description explain when to use this tool, when not to, or what alternatives exist?

"Useful for verifying the ST-Link connection before building/flashing" gives a concrete when-to-use context. There are no exclusions or named alternatives (e.g. versus stm32_list_probes for enumerating attached probes), so it stops short of full routing guidance.

Agents often have multiple tools that could apply. Explicit usage guidance like "use X instead of Y when Z" prevents misuse.