Run PCB Design Rule Check (DRC)
easyeda_run_drcRuns the native EasyEDA Pro PCB Design Rule Check on the active board and reports detailed violations, categorized counts, evidence, and target details for fixing design errors.
Instructions
Executes the native EasyEDA Pro PCB Design Rule Check (DRC) on the active board and reports detailed violations, categorized counts, evidence, document target, and execution comparison.
Input Schema
| Name | Required | Description | Default |
|---|---|---|---|
| rule | No | Optional rule name or code filter (e.g. Clearance, ShortCircuit, UnroutedNet). | |
| limit | No | Maximum number of detailed violation records to return. | |
| strict | No | Enforce strict design rule checking. | |
| target | No | Expected document target to assert execution on the intended PCB document. | |
| severity | No | Filter reported violations by severity level ('all', 'error', or 'warning'). | |
| timeoutMs | No | ||
| compareWithEditor | No | Compare execution results against editor-side DRC error state if available. |