create_start_stop
Generate a start/stop self-hold ladder logic circuit for FATEK .ldr files, with options for stop input polarity and verified or candidate stop behavior.
Instructions
Create X0/Y0 self-hold. True: X1=1 stops (verified). False: X1=0 stops (candidate).
Input Schema
| Name | Required | Description | Default |
|---|---|---|---|
| output_name | Yes | ||
| allow_unverified | No | ||
| stop_input_active_high | No |
Output Schema
| Name | Required | Description | Default |
|---|---|---|---|
No arguments | |||