Add Gnd Stitching Vias
add_gnd_stitching_viasAdd ground stitching vias across PCB with collision checking on all copper layers, using grid, around components, and zone strategies. Preview with dry run before writing.
Instructions
Drop GND stitching vias across the board with collision checking against every non-GND segment, via, and pad on every copper layer (PTH vias penetrate the full stackup, so missing any one layer is the classic silent-short failure mode). Three combinable strategies: grid (regular grid across the interior), around_refs (densify around named ICs), and in_zones (only place vias inside an actual GND copper zone). Supports dryRun to preview placements without writing.
Input Schema
| Name | Required | Description | Default |
|---|---|---|---|
| dryRun | No | If true, return the placements that would be made but don't modify the board (default false). | |
| gndNet | No | Name of the ground net (default: auto-detect GND / GROUND / VSS / /GND). | |
| maxVias | No | Cap on total placements across all strategies (default unlimited). | |
| spacing | No | Grid spacing in mm for `grid` and `around_refs` strategies (default 5.0). | |
| viaSize | No | Via pad diameter in mm (default 0.6). | |
| viaDrill | No | Via drill diameter in mm (default 0.3). Must be smaller than viaSize. | |
| clearance | No | Extra clearance beyond required between each new via and existing copper, in mm (default 0.2). | |
| edgeMargin | No | Keep-out from the board edge in mm (default 0.5). | |
| strategies | No | Which placement strategies to combine (default: ['grid']). Pass ['grid', 'around_refs', 'in_zones'] for full coverage. | |
| densifyRefs | No | Reference designators to densify ground around (used by `around_refs`). Targets: MCUs, switching regulators, RF parts. | |
| densifyRadius | No | How many grid cells around each ref to try (default 2 = 5x5 candidate field per ref). |
Output Schema
| Name | Required | Description | Default |
|---|---|---|---|
| result | Yes |