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Server Configuration

Describes the environment variables required to run the server.

NameRequiredDescriptionDefault
LOG_LEVELNoSet logging level (debug, info, warn, error)info
VERILATOR_PATHNoOverride Verilator installation path

Tools

Functions exposed to the LLM to take actions

NameDescription
verilator_compile

Compile Verilog/SystemVerilog design files to C++ using Verilator

verilator_simulate

Run RTL simulation with automatic testbench generation if needed

verilator_testbenchgenerator

Generate intelligent testbenches for Verilog/SystemVerilog modules with automatic stimulus generation

verilator_naturallanguage

Process natural language queries about RTL simulation, debugging, and analysis

Prompts

Interactive templates invoked by user choice

NameDescription

No prompts

Resources

Contextual data attached and managed by the client

NameDescription

No resources

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