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20 Best Memory MCP Servers: compared and ranked, November 2026Ranked from 5,297 matching servers on stars, growth, downloads and maintenance. Updated .

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    An MCP server that lets AI tools drive Keil uVision debugging sessions for ARM Cortex-M targets, enabling expression/variable reads, memory access, run control, breakpoints, and trace capture.
    44
    4
    MIT
  • A
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    An MCP server that turns the Game Boy Pan Docs into precise, citable lookups for registers, opcodes, memory, cartridges, and CPU behavior, enabling decompilation work.
    21
    MIT
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    Enables AI assistants like Claude to directly debug microcontrollers via JLink, supporting breakpoints, single-step, memory/register access, variable inspection, RTT logging, and firmware flashing.
    25
    7
    MIT
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    Enables AI assistants to flash firmware, program memory, modify option bytes, erase chips, reset boards, and capture SWO printf traces for STM32 microcontrollers via STM32CubeCLT.
    12
    MIT
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    An MCP server that lets AI agents control an RS PRO RS-3005P/RS-6005P programmable DC power supply over USB/RS232, enabling voltage/current control, measurements, output switching, and memory operations.
    14
    MIT
  • A
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    Enables AI tools to perform full-featured embedded microcontroller debugging via pyOCD and CMSIS-DAP probes, including probe management, flashing, breakpoints, register/memory access, fault analysis, and RTT communication.
    58
    2
    MIT
  • A
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    Enables AI assistants to interact with STM32 development boards via J-Link debugger using RTT communication, supporting connection, logging, memory operations, and firmware flashing through natural language.
    12
    1
    MIT
  • A
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    MCP server for debugging STM32 microcontrollers over ST-LINK using STM32CubeCLT tools (GDB, ST-LINK_gdbserver, STM32_Programmer_CLI) with session management, flashing, breakpoints, memory/register access, and expression evaluation.
    19
    1
    GPL 3.0
  • F
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    Enables AI agents to debug embedded systems by providing a comprehensive interface for GDB operations across multiple architectures like ARM and x86. It supports remote debugging via gdbserver or QEMU, allowing for detailed inspection of memory, registers, stack frames, and variables.
    31
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  • A
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    Stateful MCP server for driving debug probes (J-Link) to flash, debug, and inspect embedded targets. Enables AI agents to perform flash, memory, breakpoint, and ELF/SVD-aware operations conversationally.
    41
    46 PyPI
    10
    MIT
  • A
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    Enables AI agents to debug STM32 firmware on real hardware by driving GDB with OpenOCD/ST-Link/J-Link to flash, set breakpoints, inspect memory, registers and RTOS state, triage HardFaults, and profile. Returns decoded, structured evidence and suggested next actions instead of raw GDB text, with composite tools that collapse multi-step debug loops into single calls.
    86
    2
    MIT
  • A
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    MCP server bridging Lauterbach TRACE32 debuggers to AI agents for autonomous debugging, providing 47 tools for execution control, breakpoints, memory, registers, variables, and symbol inspection.
    100
    13
    MIT
  • A
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    Enables MCP clients to connect to and interact with Siemens PLCs via python-snap7, supporting read/write operations on data blocks, memory, timers, counters, and CPU management.
    22
    17 PyPI
    MIT
  • A
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    Enables AI assistants to debug embedded devices via SEGGER J-Link probes, including reading memory, flashing firmware, streaming RTT logs, and diagnosing crashes.
    48
    218 npm
    40
    MIT
  • A
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    MCP server for AI-assisted MCU and embedded firmware debugging. It connects to real hardware via debug probes, inspects CPU/memory/peripherals, manages Keil builds, and provides structured evidence for fault diagnosis.
    19
    36 PyPI
    9
    MIT
  • A
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    Enables AI assistants to debug ARM Cortex-M targets via GDB and OpenOCD, supporting attach, breakpoints, stepping, register/memory inspection, and SVD peripheral decoding.
    MIT
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    Enables AI assistants to connect to and control the IAR C-SPY debugger through MCP tools, supporting session lifecycle, run control, breakpoints, memory inspection, stack and locals viewing, disassembly, symbol lookup, and terminal I/O capture.
    5
    MIT
  • A
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    An MCP server that provides comprehensive debugging capabilities for J-Link debuggers, enabling memory, flash, register, and RTT operations through AI assistants.
    40
    MIT
  • A
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    Enables interaction with Qualcomm modems via the DIAG/QCDM protocol over serial ports, providing tools for NV read/write, memory peek/poke, and EFS file operations.
    GPL 3.0
  • A
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    Enables GDB debugging for embedded development workflows, allowing users to start sessions, load programs, set breakpoints, step through code, and examine memory/registers/variables via natural language.
    3
    MIT
  • A
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    MCP server that drives Keil µVision debug sessions for 8051/C51 targets via the native UVSOCK/UVSC interface: build, run control, breakpoints, and read/write of variables, memory & expressions (22 tools). Works with the Keil Simulator (no hardware needed) or GLink+/ULINK on real targets.
    2
    MIT
  • A
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    Enables MCP clients to control emulated and physical MSX computers through openMSX automation or a hardware agent, including screen reading, BASIC input, memory/VRAM access, file transfer, and documentation search.
    GPL 3.0
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    Enables AI agents to program, debug, and diagnose STM32H7S3 microcontrollers through SEGGER J-Link, with stateful debug sessions, memory/flash operations, GDB integration, RTT logging, and safety controls.
    MIT
  • A
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    MCP server for embedded debugging based on probe-rs, providing 22 tools for ARM Cortex-M and RISC-V microcontrollers, including connection, memory operations, breakpoints, flash programming, and RTT communication.
    2
    MIT
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    A dynamic-analysis MCP server for reverse-engineering the Broadcom BCM6726b0 WiFi driver, enabling live GDB debugging of the QEMU dhd harness with breakpoints, stepping, and memory inspection.
    MIT
  • A
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    Drives a SEGGER J-Link probe to debug microcontrollers, enabling firmware flashing, CPU halt/resume/reset/step, and reading or writing memory, peripheral registers and core registers. Also exposes an escape hatch for arbitrary J-Link Commander commands.
    218 npm
    MIT
  • A
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    Enables AI agents to debug and inspect embedded ARM Cortex-M and RISC-V targets through probe-rs — execution control, memory inspection, live CoreSight AP access, firmware-free peripheral bringup, and crash/fault decoding — without external GDB or OpenOCD, and while sharing a single hardware session with a human's VS Code debug session. It runs both embedded in the VS Code extension and headless over Streamable HTTP or stdio for CI/CD and terminal agents.
    MIT
  • A
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    Enables Large Language Models to act as co-debuggers for Texas Instruments embedded systems by providing real-time variable monitoring, memory manipulation, and motor control analysis through OpenOCD proxy architecture. Supports debugging TI microcontrollers with XDS110 debug probes while working alongside Code Composer Studio.
    1
    MIT
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    Enables AI agents to control TriCore/AURIX debug sessions, including workspace loading, target connection, flashing, run control, breakpoints, and reading variables, registers, memory, and call stacks via the UDE Object Model.
    MIT