mcp-gds
Related Servers
Alternatives to mcp-gds
No user-submitted related servers found.
Related Servers
- AlicenseBqualityAmaintenanceEnables AI agents to turn natural-language hardware prompts into deterministic schematics and netlists, query live LCSC parts data, validate designs, calculate trace impedance, and estimate PCBA BOM costs through stdio MCP tools and resources.581,632 PyPI1MIT
- FlicenseNot gradedqualityBmaintenanceEnables AI agents to automate 嘉立创 EDA Professional through MCP, including schematic and PCB editing, component search and placement, net routing, DRC, and design capture.-
- AlicenseAqualityBmaintenanceEnables AI assistants to manage Sentaurus TCAD simulation experiments via MCP, including creating and submitting jobs, querying status, reading logs, and listing output files.69Apache 2.0
- AlicenseNot gradedqualityAmaintenanceEnables MCP-capable AI agents to generate and reorganize schematics, resolve LCSC components, place and route PCBs with custom DRC constraints, inspect design data, and safely apply, repair, or restore changes in native EasyEDA Pro and JLCEDA documents.178MIT
- AlicenseNot gradedqualityBmaintenanceEnables AI agents to procedurally generate, transform, inspect, and export 3D meshes and scenes through MCP tools.1MIT
- AlicenseAqualityBmaintenanceEnables AI coding agents and IDEs to lint, compile, syntax-check, and simulate Verilog/SystemVerilog designs through structured, token-efficient MCP tools with isolated containerized toolchains.410 npmApache 2.0
TDQS
Scored across 6 tools
Each tool has a clear, distinct purpose: metadata reading, DEF-to-GDS conversion, DRC, LVS, extraction, and version info. No overlapping or ambiguous responsibilities.
Names generally follow a predictable pattern, but mix domain-first (gds_info, gds_stream_out) with verb-first (extract_magic) and tool-specific suffixes (drc_klayout, lvs_netgen). Slightly inconsistent but still mostly intuitive.
Six tools cover the essential operations for a layout-to-signoff verification workflow without redundancy or overload. The count feels well-scoped.
The set covers the main EDA flow steps (metadata, conversion, DRC, LVS, extraction, environment info). Minor gaps like a dedicated netlist viewer or layout manipulation tool could be added, but the core cycle is complete.