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Debug_Mcp
by xhw949

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    • A
      license
      Not graded
      quality
      D
      maintenance
      Enables AI assistants to debug ARM Cortex-M targets via GDB and OpenOCD, supporting attach, breakpoints, stepping, register/memory inspection, and SVD peripheral decoding.
      MIT
    • A
      license
      A
      quality
      C
      maintenance
      Enables AI tools to perform full-featured embedded microcontroller debugging via pyOCD and CMSIS-DAP probes, including probe management, flashing, breakpoints, register/memory access, fault analysis, and RTT communication.
      58
      2
      MIT
    • A
      license
      Not graded
      quality
      B
      maintenance
      Enables AI agents to debug and inspect embedded ARM Cortex-M and RISC-V targets through probe-rs — execution control, memory inspection, live CoreSight AP access, firmware-free peripheral bringup, and crash/fault decoding — without external GDB or OpenOCD, and while sharing a single hardware session with a human's VS Code debug session. It runs both embedded in the VS Code extension and headless over Streamable HTTP or stdio for CI/CD and terminal agents.
      MIT
    • A
      license
      Not graded
      quality
      C
      maintenance
      Enables AI agents to compile, debug, sample, and inspect MCU firmware through J-Link/pyOCD or a mock engine, including breakpoints, watchpoints, single-stepping, register access, and flash dump operations.
      MIT
    • A
      license
      B
      quality
      C
      maintenance
      Сonnects to live JVMs via JDWP protocol, enabling LLM agents to autonomously debug Java applications — attach to a running process, pause threads, set breakpoints (including conditional), inspect stacks with auto-resolved object fields, evaluate methods, set variable values, and diagnose issues like deadlocks and hung queries.
      28
      16 PyPI
      1
      MIT
    • A
      license
      A
      quality
      D
      maintenance
      Enables AI assistants like Claude to directly debug microcontrollers via JLink, supporting breakpoints, single-step, memory/register access, variable inspection, RTT logging, and firmware flashing.
      25
      7
      MIT