Run design rule check
easyeda_drc_runRun PCB design rule checks (DRC) in EasyEDA Pro and refresh its visible DRC panel. Requires a focused PCB document; returns coarse severity counts, with per-violation detail staying in EasyEDA Pro.
Instructions
Run EasyEDA Pro's native PCB DRC and refresh its visible DRC panel. Requires a PCB document to be focused; otherwise returns an indeterminate not_available result with an actionable focus error. Returns coarse severity counts; per-violation detail stays in EasyEDA Pro.
Input Schema
| Name | Required | Description | Default |
|---|---|---|---|
| rules | No | ||
| projectId | Yes |
Output Schema
| Name | Required | Description | Default |
|---|---|---|---|
| error | No | ||
| passed | Yes | ||
| project_id | Yes | ||
| violations | Yes | ||
| error_count | Yes | ||
| not_available | No | ||
| warning_count | Yes | ||
| total_violations | Yes |