get_sim_paths
Discover compile, simulation, and waveform files under a verif directory, optionally filtering by case name or overriding paths for non-standard layouts.
Instructions
Discover compile logs, simulation logs, and waveform files under a verif directory. If case_name is omitted, the tool returns available cases. For non-standard layouts you may pass explicit sim_log / wave_file / compile_log paths; any provided field is used as-is and the omitted ones are still auto-discovered (a sim_log path also anchors discovery of the matching waveform and compile/elab logs).
Input Schema
| Name | Required | Description | Default |
|---|---|---|---|
| sim_log | No | Optional explicit simulation log path (absolute, or relative to verif_root). Used verbatim, and its directory anchors discovery of the waveform and compile/elab logs for the same case. | |
| case_name | No | Optional case name, for example case0 (matching make SV_CASE=case0) | |
| wave_file | No | Optional explicit waveform path (FSDB/VCD), absolute or relative to verif_root. Used verbatim when given; otherwise discovered. | |
| verif_root | Yes | Absolute path to the project's verif/ directory, for example /path/to/project/verif | |
| compile_log | No | Optional explicit compile/elaborate log path, absolute or relative to verif_root. Used verbatim when given; otherwise discovered from the case dir, the parent top, or a sibling build/elab dir. |