build_tb_hierarchy
Parses compile and elaboration logs, scans source files, and caches the full testbench hierarchy server-side, returning a summary and handle for on-demand access.
Instructions
Stream one compile/elaborate log plus optional complementary phase logs, scan source files, and cache the full testbench hierarchy server-side without retaining raw source bodies. For split VCS flows, prefer the source-compile log as compile_log and pass VHDL/source/elaboration companions in build order; later connectivity tools continue using that primary path. Returns a SLIM payload: project, stats, tree_skeleton (depth 2), interfaces, ambiguous_basenames, build_metrics, and hierarchy_handle. A configured timeout/source-byte guard returns build_status='blocked' plus a fixed blocker and no handle. Use a completed handle with get_tb_subtree / lookup_tb_files / find_tb_instance / get_tb_file_detail / get_tb_class_hierarchy / dump_tb_section to access the full data on demand.
Input Schema
| Name | Required | Description | Default |
|---|---|---|---|
| simulator | No | vcs / xcelium / auto (default: auto) | auto |
| compile_log | Yes | Absolute path to the primary compile or elaborate log | |
| supplementary_compile_logs | No | Optional ordered complementary compile/elaboration logs from the same simulator build; their order participates in the hierarchy and Source Graph identity |