configure_bus_parallel
Configure a bus as parallel decoding by setting data source, clock, width, bit mapping, polarity, and display to decode parallel data lines from an oscilloscope.
Instructions
Set Bus to PARallel decoding and configure it (manual 3.4.10).
bus_source: data source D7D0|D15D8|D15D0|D0D7|D8D15|D0D15|CH1..CH4|USER (USER enables the per-bit sources below) clk: clock source CH1..CH4 or D0..D15, or OFF to sample on data change clk_slope: POSitive|NEGative|BOTH clock edge sampled on width: data width 1..16 (analog sources are limited to 1..4) bit / bit_source: select data bit 0..width-1, then its line source (BUS_source must be USER) endian: NEGative|POSitive (NEGative = inverted, manual default) polarity: NEGative|POSitive data polarity display: enable the decoding bus
Input Schema
| Name | Required | Description | Default |
|---|---|---|---|
| bit | No | ||
| bus | Yes | ||
| clk | No | ||
| width | No | ||
| endian | No | ||
| display | No | ||
| polarity | No | ||
| clk_slope | No | ||
| bit_source | No | ||
| bus_source | No |
Output Schema
| Name | Required | Description | Default |
|---|---|---|---|
| result | Yes |