confirm_pour_step
Run a plane pour on a scratch copy, grade the candidate, and write a new board revision only when accepted—source stays untouched.
Instructions
Run the plane router on a scratch copy of the board, grade its candidate, and only if accepted write a NEW board revision with the zone (plus any vias/tracks the plane script added); the source is untouched. The revision_token is single use.
baseline: the dict from pin_rule_baseline, REQUIRED (this step never pins silently; an empty baseline is refused as incomplete). Input preparation (propose_input_preparation) must have run first: a board with copper-layer text is refused.
What status poured proves: the candidate was graded by verify_board's gate, the zone is
filled (measured in a kicad-cli refilled copy; the file on disk holds the outline only)
and no pad was found isolated by the checks listed in the result. It does NOT prove the
board is connected or complete: each pad in pads carries connectivity: proven|unproven
(unproven pads, e.g. waiting for a via, and every open signal remain). Only verify_board
certifies a board.
Cost per confirm: about 12 gate runs (kicad-cli DRC) plus connectivity runs, capped at 40 in total; expect minutes, not seconds. Over the cap a pad is never accepted unproven.
In the result, pcb_path is the new revision (same as output_pcb) and source_pcb is the board you passed in; both gates are stale until verify_board runs on the revision.
Input Schema
| Name | Required | Description | Default |
|---|---|---|---|
| parity | Yes | ||
| baseline | Yes | ||
| pcb_path | Yes | ||
| parity_reason | No | ||
| revision_token | Yes |