An AI-centric MCP server that enables automated Xilinx Vivado workflows, including project management, synthesis, implementation, and timing analysis. It allows AI agents to drive hardware design processes while integrating directly with the official Vivado GUI for visual context.
A lean MCP server that lets AI agents drive Xilinx Vivado for synthesis, implementation, simulation, and diagnostics through 30 curated tools and raw Tcl execution.
A comprehensive Model Context Protocol server that connects AI assistants to Electronic Design Automation tools, enabling Verilog synthesis, simulation, ASIC design flows, and waveform analysis through natural language interaction.
A minimal MCP server that provides 25 tools and 5 hooks to control Xilinx Vivado EDA for FPGA development, including session management, Tcl execution, smart diagnostics, and IP debugging.
MCP server for AMD Xilinx Vivado 2023.1 that enables Claude Code to act as an AI FPGA engineer, providing 27 tools for querying, building, simulating, and programming FPGA designs.