Run electrical rule checks
run_ercRun electrical rule checks on a design's netlist and return complete findings grouped by severity and rule to flag connectivity and naming issues.
Instructions
Run electrical rule checks (ERC) on a design's netlist and return findings grouped by severity (errors, warnings) then rule id. Full output, never truncated. Rules: net.single_pin (error: a net with one functional pin and no test point), net.testpoint_orphan (error: a net touched only by test points), net.testpoint_stub (warning: one functional pin plus test point(s)), net.whitespace_in_name (warning: a net name with leading or trailing whitespace; for Cadence, the Allegro netlister trims it), net.whitespace_name_collision (error: separate nets whose names read the same once trimmed, such as " SIG" and SIG), net.unnamed (warning: an auto-generated net name on a real 2+-pin net). Test points are identified by the TP refdes prefix. Findings key each net to its REFDES.PIN endpoints (always arrays); net.unnamed lists bare net names. checked lists the rules that ran, so a rule absent from the findings found nothing, and skipped counts the parts left out of the run, such as Do-Not-Stuff ones. Use include_rules/exclude_rules (rule ids) to scope the run and include_dns to count Do-Not-Stuff parts; an unknown rule id returns an error rather than silently checking nothing. Unconnected pins without a no-connect symbol are NOT checked: the parsers cannot reliably tell them apart from intentional no-connects.
Input Schema
| Name | Required | Description | Default |
|---|---|---|---|
| design | Yes | Path to design file | |
| include_dns | No | Include DNS (Do Not Stuff) components in the checks | |
| exclude_rules | No | Skip these rule ids | |
| include_rules | No | Only run these rule ids (e.g., ['net.single_pin']). Omit for all | |
| design_variant | No | Design variant name from list_designs' design_variants. Required when the design records named variants, which are its only builds. <Default> (alias: default) is the one build of a design that records none |