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    • A
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      Wraps Quartus II 9.1 command-line tools into MCP tools, enabling AI agents to create projects, assign pins, generate simulation waveforms, run simulations, compile, read reports, and program devices.
      16
      5
      MIT
    • A
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      Enables AI coding agents and IDEs to lint, compile, syntax-check, and simulate Verilog/SystemVerilog designs through structured, token-efficient MCP tools with isolated containerized toolchains.
      4
      33 npm
      Apache 2.0
    • A
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      Not graded
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      Enables AI assistants to drive Xilinx Vivado, Intel Quartus, and Anlogic TangDynasty for FPGA development, including project creation, synthesis, implementation, timing closure, and hardware programming through natural language.
      56 PyPI
      2
      MIT
    • A
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      Enables automation of Intel/Altera Quartus FPGA design flow including project management, compilation, simulation, timing analysis, and programming via Claude Code.
      1
      MIT
    • A
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      Provides AI assistants with a complete FPGA toolchain for HDL linting, simulation, synthesis, and place-and-route across various hardware targets. It features a GitHub-backed IP core registry that enables users to search for and import MIT-licensed cores directly through their chat interface.
      15
      1
      MIT
    • A
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      Provides programmatic access to Arcas OnlineEDA platform for electronic design automation, enabling formal verification, equivalence checking, power analysis, security verification, and FPGA design through natural language and automated workflows.
      5
      MIT