Detect the local KiCad install. Returns version, path, and whether it meets the minimum required version. On a missing or outdated install, returns an install_hint with platform-specific guidance. Never runs installs itself.

Scaffold a new KiCad project at // with a .kicad_pro carrying JLCPCB-tuned design rules, an empty .kicad_sch, and libs/ + manufacturing/ subdirectories. Sets the new project as the active session workspace.

Load an existing KiCad project (path to a .kicad_pro file or its containing directory). Validates the manifest, ensures libs/ and manufacturing/ subdirectories exist, and sets the project as the active session workspace. Returns a manifest of the project's current state.

Search the LCSC / JLCPCB catalog for parts matching a free-text query. Defaults to basic-tier parts only (no JLCPCB assembly setup fee). Set basic_only=false to include extended parts. Results are sorted basic-first then by descending stock.

Download symbol + footprint (and 3D model when available) for a single LCSC C-number and install them into the active project's libs/ directory. Geometry comes from EasyEDA: real pin names and numbers for the symbol, real pad positions, sizes and drills for the footprint. If EasyEDA is unreachable or has no geometry for the part, a placeholder is written instead and the response says so in warnings — read them, because a placeholder footprint will NOT match the real part and must be replaced before ordering.

Generate a .kicad_sch from a declarative netlist spec. The spec lists components (with LCSC C-numbers and footprints) and named nets connecting their pins. The generated schematic passes basic ERC and is ready to open in KiCad for human review and PCB layout.

Generate a fully-wired .kicad_pcb from a declarative spec using KiCad's pcbnew Python API. Each component in the spec needs an LCSC C-number — the plugin auto-fetches pin maps from EasyEDA so your nets can reference pin NAMES (like 'GPIO10' or 'VCC') instead of numbers. First run may pause ~12 seconds per unique IC for EasyEDA's rate limit; results are cached in SQLite so subsequent runs are instant. The tool then auto-places footprints in three bands (connectors on top, ICs in middle, passives below), wires every net pad-to-pad, and draws a board outline. Result: a .kicad_pcb ready to open in KiCad or EasyEDA for routing. REQUIRES KiCad 8+ installed (pcbnew is KiCad-side Python).

Fetch the pin-name → pad-number map for an LCSC C-number from EasyEDA's component endpoint. Used internally by pcb_generate; exposed as a standalone tool so Claude can inspect a part's pinout before constructing a nets spec. Rate-limited (~12s between unique fetches); cached indefinitely in SQLite after first fetch.

Produce the final handoff message for the user: the path to the generated .kicad_pcb and step-by-step instructions for importing it into easyeda.com for routing and ordering. This is the recommended terminal tool of the plugin — EasyEDA handles the final routing + JLCPCB ordering step far more reliably than any headless auto-router we could ship.

Run all kicad-cli manufacturing exports on the active project's .kicad_pcb (gerbers, drill, position, BOM), rename gerbers to Protel extensions, drill to .XLN, and zip everything into a JLCPCB-ready manufacturing/jlcpcb--.zip. Requires that placement and routing are already done in KiCad — this is the terminal tool in the workflow.

Run KiCad's Electrical Rules Check (ERC) on a schematic via kicad-cli. Returns counts of errors and warnings plus a path to the full report. Errors > 0 means the schematic has structural problems that should be fixed before layout.

Record that the user has reviewed and approved the BOM. Call this immediately after they confirm at the BOM checkpoint, before pcb_generate. Without it the approval lives only in the conversation: if Claude Code restarts, session_resume reports the BOM as merely 'sourced' and the user is asked to approve the same BOM again. Spending money on a board is the one decision in this workflow worth making durable.

Inspect the .kicad_jlcpcb_session.json in a project directory to see where a prior workflow left off. Returns the current stage (created / parts_sourced / bom_confirmed / pcb_generated / handoff_rendered), which checkpoints are complete, and a recommended next step. Use at the start of /pcb-new or /pcb-from-bom on an existing project to offer the user a resume-or-restart choice.

Resolve a list of BOM rows to concrete LCSC parts. Each row may specify an LCSC C-number directly or a free-text query with an optional package. Hard-prefers basic-tier parts; for any row that resolves to an extended part, attaches a cost-impact warning and tallies the JLCPCB assembly setup fee.