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Enables AI agents such as Claude Code, Cursor, and Codex to safely drive a locally installed Xilinx Vivado through 32 MCP tools spanning GUI/Tcl/attach sessions, synthesis, implementation, timing and CDC analysis, XDC/IO validation, IP inspection, VCD waveform queries, and device programming. It adds structured JSON timing evidence with baseline comparison, Chinese-language diagnostics for CRITICAL WARNINGs, environment self-checks, and evidence-driven workflow prompts that gate each FPGA design stage.