ppk2_logic
Capture and analyze digital logic signals on 8 channels (D0–D7) using the PPK2. Returns per-channel statistics including high fraction, edge count, and level transitions, with optional downsampled series.
Instructions
Capture the PPK2's 8 digital logic channels (D0–D7) — a logic analyser.
The PPK2 samples 8 digital inputs alongside current at ~100k samples/s.
This starts sampling, discards a settling window, collects digital states
for duration_seconds, and returns per-channel statistics: the fraction of
time each channel was high, the number of edges (level transitions), and the
first/last observed level. Requires a prior ppk2_configure.
Note: unconnected digital pins float and may read a constant or noisy level; drive them from your DUT to see real activity.
Args: duration_seconds: Capture window after settling. 0.05–60. settle_ms: Initial samples discarded before timing starts. Default 100 ms. channels: Which channels (0–7) to report. Default all eight. include_series: If true, also return a downsampled level series per channel (each point is the fraction high over that block, 0.0–1.0). series_points: Target number of points in each downsampled series.
Returns sample count, achieved sample rate, and a channels map keyed by
channel index.
Input Schema
| Name | Required | Description | Default |
|---|---|---|---|
| duration_seconds | No | ||
| settle_ms | No | ||
| channels | No | ||
| include_series | No | ||
| series_points | No |
Output Schema
| Name | Required | Description | Default |
|---|---|---|---|
No arguments | |||