pcb_run_drc
Run Design Rule Check (DRC) on a PCB to find rule violations before fabrication export. Returns a pass/fail result and, when supported, per-violation error details.
Instructions
Run Design Rule Check (DRC) on the PCB. Returns { passed, errors? }. Some EDA Pro builds report only a pass/fail boolean at runtime (upstream pro-api-sdk issue #27); in that case "errors" is absent and a note says per-violation detail is unavailable. Run this (with connectivity checks) before any fabrication export.
Input Schema
| Name | Required | Description | Default |
|---|---|---|---|
| ui | No | Whether to show DRC results in UI | |
| limit | No | Truncate result array to at most N items | |
| fields | No | Project results to only these top-level keys. Response includes _availableFields showing all keys. IMPORTANT: Always specify fields when you know what you need — without it, responses include every property and can be extremely large (100KB+), wasting context. | |
| filter | No | Keep items matching all conditions (AND). Exact: {key: value}, prefix glob: {key: "R*"}, OR: {key: ["a","b"]} | |
| strict | No | Whether to run strict DRC checks | |
| verbose | No | If true, returns detailed violation list | |
| document | Yes | Target document UUID — auto-switches to this document before executing. Get UUIDs from list_instances or editor_get_open_tabs. | |
| instance_id | No | Target EasyEDA instance ID (8-char hex). Required when multiple instances are connected. Omit when only one instance is connected (auto-selected). Use list_instances to see connected instances. |