find_leak
Localise timing leaks in Verilog designs: identify which secret inputs reach the completion signal and measure the fan-in cone size.
Instructions
Localise a timing leak: name the secret inputs that reach the completion signal, and how large its fan-in cone is.
Input Schema
| Name | Required | Description | Default |
|---|---|---|---|
| module | No | ||
| secrets | Yes | ||
| verilog | Yes | ||
| observation | No |