kicad-forge
Server Configuration
Describes the environment variables required to run the server.
| Name | Required | Description | Default |
|---|---|---|---|
No arguments | |||
Instructions
Guidance the server publishes about itself, which clients place ahead of the tool catalog so the model reads it before choosing anything.
This server publishes no instructions, or was last inspected before Glama recorded them.
Capabilities
Features and capabilities supported by this server
Protocol revision2025-11-25
| Capability | Details |
|---|---|
| tools | {
"listChanged": false
} |
| prompts | {
"listChanged": false
} |
| resources | {
"subscribe": false,
"listChanged": false
} |
| experimental | {} |
Tools
Functions exposed to the LLM to take actions
| Name | Description |
|---|---|
| capabilitiesA | Report what this server can do, what it deliberately does not do, and which external tools were found. |
| analyze_projectA | Full review of a KiCad project: components, nets, analog/digital analysis, PCB routing and DFM. Pass a .kicad_sch and optionally a .kicad_pcb. |
| list_componentsB | List components in a schematic, with optional reference-prefix or value filters. |
| list_netsB | Derive the netlist geometrically from the schematic files. Works with no KiCad installed. |
| trace_connectionsC | Trace every connection from a component, or from one specific pin. |
| verify_netlistA | Cross-check our geometric net tracing against KiCad's own netlist exporter. Requires KiCad installed. This is the authoritative correctness check. |
| pcb_statisticsC | Board statistics: layers, dimensions, footprints, tracks, vias, zones. |
| pcb_connectivityB | Copper connectivity: which nets are fully routed, unrouted, or split into islands. |
| list_footprintsA | List PCB footprints, optionally filtered to one side. |
| create_kicad_projectB | Create a new KiCad project (.kicad_pro/.kicad_sch/.kicad_pcb), optionally with a board outline. |
| add_componentB | Add a component to a schematic. Uses the installed KiCad symbol libraries when available, otherwise a built-in symbol set. Writes atomically. |
| add_generic_icA | Add a generic rectangular IC symbol by pin list. Use when the part is not in any installed library. pins_json: [[number, name, electrical_type], ...] |
| add_wireA | Draw a wire between two points (mm, snapped to the 1.27 mm grid). |
| add_labelB | Place a net label. kind is local, global or hierarchical. Local labels join nets within one sheet; global labels join across the design. |
| component_pin_positionsB | Report the pin coordinates of a placed component, so wires can be drawn to exactly the right points. |
| export_spice_netlistB | Export a SPICE netlist from the schematic. Active devices are listed as skipped rather than guessed. |
| simulate_subcircuitsC | Generate SPICE testbenches for every subcircuit the detectors found, run them if a simulator is present, and compare simulated against analytical values. |
| run_spiceC | Run an arbitrary SPICE deck and return the parsed measurements. |
Prompts
Interactive templates invoked by user choice
| Name | Description |
|---|---|
No prompts | |
Resources
Contextual data attached and managed by the client
| Name | Description |
|---|---|
No resources | |
TDQS
Scored across 18 tools
Tools map to distinct actions and resources, so an agent can usually tell list_components from list_nets or pcb_statistics. The slight overlap comes from the SPICE-related tools and analyze_project, which can approach similar territory but are differentiated by purpose and output.
Most tools follow a clear snake_case verb_noun or area_noun pattern: list_*, add_*, pcb_*, simulate_*, run_*. A few names like capabilities and component_pin_positions are noun phrases rather than verb-first actions, but the overall style is consistent enough to navigate.
With 18 tools the server is slightly above the typical well-scoped 3-15 range, but the tool set spans schematic analysis, PCB analysis, project creation, and simulation. Each tool has a distinct job, so the larger count is justified rather than bloated.
The server covers project creation, additive schematic editing, net tracing, PCB statistics/connectivity, and SPICE workflows well. However, it lacks update, remove, or move operations for components, wires, and labels, leaving the editing lifecycle incomplete for a design tool.