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Vibe-Coding Hardware MCP Server (vibe-hardware-mcp)

mcptry calligraphysystems/vibe-hardware-mcp MCP server

A zero-dependency Python 3 Model Context Protocol (MCP) server (calligraphy_mcp_stdio.py) for local KiCad .kicad_pcb & Specctra .dsn parsing, PCB transmission-line impedance & IPC-2152 current calculation, local Design-for-Manufacturing (DFM) rule auditing, and multi-layer PCB trace routing.


Architecture & Included MCP Tools (calligraphy_mcp_stdio.py)

This repository contains the complete, zero-dependency Python 3 MCP server implementation in calligraphy_mcp_stdio.py (containerized via Dockerfile):

1. Local Offline PCB Analysis, Impedance & DFM Tools (100% Local Execution)

Tool Name

Execution

Description

analyze_kicad_pcb

Local Python

Parses .kicad_pcb S-expression files locally to extract copper layer stackup (F.Cu, B.Cu, In1.Cu..), board outline dimensions (Edge.Cuts in mm), footprint count, SMD/THT pad counts, fine-pitch (<= 0.50 mm) pad density, netlist count, and routed track/arc/via statistics.

analyze_specctra_dsn

Local Python

Parses Specctra .dsn autorouter files locally to extract units, resolution, signal/power layers, board boundary dimensions, component pin count, net connectivity, and design rule clearances/widths.

calculate_pcb_trace_impedance

Local Python

Closed-form IPC-2141A / Hammerstad-Jensen microstrip & stripline characteristic impedance ($Z_0$), edge-coupled differential pair impedance ($Z_{\text{diff}}$), propagation delay (ps/mm), and IPC-2152 DC current capacity / temperature-rise solver.

audit_pcb_dfm_rules

Local Python

Audits .kicad_pcb and .dsn trace widths, clearances, via drill diameters, and annular rings locally against standard_2l, standard_4l, and fine_hdi fabrication limits (JLCPCB / PCBWay).

calligraphy_list_gallery_boards

Local Python

Returns the built-in catalog of 13 verified open-source reference PCBs (100.0% routed completion, 0 native KiCad copper DRC violations).

2. Optional Cloud Co-Processor Tools (Multi-Layer 3D PCB Routing Offload)

For dense multi-layer boards that require full 3D trace routing, G1 circular arc smoothing, teardrop pad reinforcement, and turnkey Gerber/Excellon/IPC-D-356 .ZIP generation, the server also exposes optional co-processor tools (calligraphy_preflight_audit, calligraphy_compile_board, calligraphy_get_job_status, calligraphy_download_fab_bundle, calligraphy_route_pcb).


Related MCP server: mcp-kicad

Quick Start (Local stdio & Docker)

Option 1: Run Locally via Python 3 (stdio Transport)

No external pip packages are required (uses Python 3.10+ standard library):

{
  "mcpServers": {
    "vibe-hardware-mcp": {
      "command": "python3",
      "args": ["/path/to/vibe-hardware-mcp/calligraphy_mcp_stdio.py"]
    }
  }
}

Option 2: Run via Docker (Dockerfile)

docker build -t vibe-hardware-mcp .
docker run -i --rm vibe-hardware-mcp

Option 3: Remote Streamable-HTTP Endpoint (Claude Code / Cursor)

claude mcp add --transport http calligraphy-eda https://calligraphyeda.com/api/v1/mcp

Visual Proof: 55 / 55 Verified Open-Source Benchmark Sweep (20 / 20 PCBench Tier T + 13 / 13 Tier D + 22 / 22 Multi-ECAD at 100.0% Completion & 0 Native KiCad 9 DRC)

20/20 PCBench Tier T & 55/55 Total 0-DRC Benchmark Sweep

Full 20-Board PCBench Tier T & 13-Board Tier D Scoreboard: github.com/calligraphysystems/open-pcb-routing-benchmark

Benchmark Board

350-DPI Routed Copper Proof (0 DRC)

3D Raytraced Assembly Render

Karabas-Nano (2-Layer, 738 Pads, 928 Connections)100.0% Completion • 0 Unconnected • 0 KiCad DRC

Karabas-Nano 2L Copper Proof

Karabas-Nano 2L 3D Render

Decelerator4030 (908 Pads, 487 Connections, Off-Axis 45° LQFP-100)100.0% Completion • 0 Unconnected • 0 KiCad DRC

Decelerator4030 Copper Proof

Decelerator4030 3D Render

Teensy MCU Breakout (High-Density Through-Hole + SMD)100.0% Completion • 0 Unconnected • 0 KiCad DRC

Teensy MCU Breakout Copper Proof

Teensy MCU Breakout 3D Render


License

MIT License — Copyright (c) 2026 Calligraphy Systems LLC (https://calligraphyeda.com).

Available Tools

15 tools
analyze_kicad_pcbAnalyze KiCad PCB LayoutA
Read-onlyIdempotent
Inspect

Parse and analyze a KiCad .kicad_pcb board locally (from pcb_text or project_path). Extracts copper layer stackup, board outline dimensions (mm), footprint count, SMD vs THT pad counts, fine-pitch (<=0.50mm) pad count, net count, routed trace/arc segment statistics, and via count.

Inputs: pcb_text, project_path.

analyze_specctra_dsnAnalyze Specctra DSN Autorouter FileA
Read-onlyIdempotent
Inspect

Parse and analyze a Specctra .dsn PCB autorouter file locally (from dsn_text or project_path). Extracts units, resolution, signal/power copper layers, board boundary dimensions, component count, netlist summary, and design rule clearances/widths.

Inputs: dsn_text, project_path.

audit_pcb_dfm_rulesAudit PCB DFM Fabrication RulesB
Read-onlyIdempotent
Inspect

Run a local Design-for-Manufacturing (DFM) rule check on a .kicad_pcb or .dsn file against standard 2-layer or 4-layer fabrication limits (minimum trace width, clearance, via hole diameter, and annular ring width).

Inputs: fab_tier, pcb_text, project_path.

calculate_pcb_trace_impedanceCalculate PCB Trace Impedance & IPC-2152 CurrentA
Read-onlyIdempotent
Inspect

Local PCB transmission-line impedance & IPC-2152 trace current calculator. Computes single-ended microstrip/stripline Z0 (Ohms), edge-coupled differential Zdiff (Ohms), propagation delay (ps/mm), and recommended trace width for a target impedance or DC current (Amps).

Inputs: er, mode, current_amps, trace_width_mm, +4 more.

calligraphy_compile_boardCompile & Route PCB in Cloud EnclaveAInspect

Compile a PCB through Calligraphy EDA (3D HDI synthesis + Snowman teardrop pad fillets + Zero-VIPPO DFM surgery + 3D nodal G*V=I physics) and return 0-DRC telemetry, preview crops, a single clickable Stripe Checkout URL, and watch-only per-job USDT/USDC stablecoin payment instructions. Mode A (Zero-File Demo): Pass sample_id='2l_rp2040' (or '2l_stickhub', '4l_carrier'). Mode B (User's Local Board): Pass a local file path in project_path (stdio mode) or pass its contents in pcb_text + filename (or upload_b64 for .PcbDoc/.zip).

Inputs: filename, pcb_text, sample_id, upload_b64, +9 more.

calligraphy_create_coinbase_checkoutCreate Coinbase Base L2 USDC Checkout SessionBInspect

Create a 1-Click Coinbase Pay / Coinbase Onchain Payment Protocol checkout session (and x402 AI-agent payment URL) settling in USDC on Base (chain_id=8453) with automatic DEX token conversion and zero gas-dust sweeping.

Inputs: job_id (required), network, currency.

calligraphy_download_fab_bundleDownload Unlocked Turnkey Fabrication BundleA
Read-onlyIdempotent
Inspect

Download the unlocked routed .kicad_pcb and turnkey JLCPCB/PCBWay .zip bundle (Gerbers, Excellon drills, IPC-D-356, BOM, CPL, and 3D HTML5 viewer) once paid via Stripe Checkout, autonomous USDT/USDC stablecoin verification, or active 30-day board license.

Inputs: job_id (required), output_dir, include_bundle_b64.

calligraphy_get_job_statusGet PCB Synthesis Job StatusA
Read-onlyIdempotent
Inspect

Query the compilation and payment status of a Calligraphy EDA job (job_id). When status is COMPLETED_AWAITING_PAYMENT, returns stablecoin_payment_instructions with the job's unique watch-only deposit_address (0x...) for autonomous USDT/USDC checkout.

Inputs: job_id (required).

calligraphy_lookup_b2b_invoiceLook Up B2B Tax Invoice & Custody CertificateB
Read-onlyIdempotent
Inspect

Look up a Calligraphy EDA job and generate a B2B Tax Invoice & Chain-of-Custody Certificate with custom PO number and company name.

Inputs: job_id (required), po_number, company_name, customer_email.

calligraphy_preflight_auditRun Pre-Flight CAD Doctor & Instant Tier QuoteA
Read-onlyIdempotent
Inspect

Inspect a .kicad_pcb file or .zip project bundle (including atopile/tscircuit/Altium/Allegro builds), verify outline/pad readiness, and return a deterministic 3-Lever NRE-anchored price quote ($149 vibe_micro for <=150 pads up to $1,495+ route_3d). Mode A (Zero-File Demo): Pass sample_id='2l_rp2040' (or '2l_stickhub', '4l_carrier'). Mode B (User's Local Board): Pass a local file path in project_path (stdio mode) or pass its contents in pcb_text + filename (or upload_b64 for .PcbDoc/.zip).

Inputs: filename, pcb_text, sample_id, upload_b64, +5 more.

calligraphy_purge_job_vaultPurge Enclave Job VaultA
DestructiveIdempotent
Inspect

Immediately shred all enclave CAD and synthesis artifacts for job_id and return a cryptographically signed CertificateOfDestruction (zero_retention_verified=True).

Inputs: job_id (required).

calligraphy_request_ip_whitelistRequest Enterprise IP Whitelist QuotaBInspect

Submit a Support Whitelist Request for an engineering team, corporate NAT IP, or PCB layout agency that needs higher daily compilation write limits (e.g. 25–100 compiles/day).

Inputs: reason (required), customer_email (required), organization_name (required), client_ip, +1 more.

calligraphy_route_pcbSynthesize & Route Multi-Layer PCBAInspect

Alias for calligraphy_compile_board: synthesize and route a PCB through Calligraphy EDA (0 opens, 0 DRC) and return Stripe, Coinbase Pay (x402), and watch-only USDT/USDC payment instructions. Mode A (Zero-File Demo): Pass sample_id='2l_rp2040' (or '2l_stickhub', '4l_carrier'). Mode B (User's Local Board): Pass a local file path in project_path (stdio mode) or pass its contents in pcb_text + filename (or upload_b64 for .PcbDoc/.zip).

Inputs: filename, pcb_text, sample_id, upload_b64, +3 more.

calligraphy_verify_stablecoin_paymentVerify On-Chain Stablecoin PaymentA
Idempotent
Inspect

Submit an on-chain USDT or USDC transaction hash (tx_hash) sent to the job's unique watch-only deposit_address on base, arbitrum, polygon, or ethereum to receive a private HMAC-SHA256 payment receipt (receipt_hmac_sha256) and immediately unlock calligraphy_download_fab_bundle with zero human browser intervention.

Inputs: job_id (required), tx_hash (required), token, network.

Tool Schema Changelog

Recent tool additions, removals, and schema changes observed during successful MCP inspections.

Loading tool schema changelog…

    TDQS

    A3.6/5.0

    Scored across 15 tools

    Disambiguation3/5

    The local analysis tools (analyze_kicad_pcb, analyze_specctra_dsn, calculate_pcb_trace_impedance, audit_pcb_dfm_rules) are cleanly distinct, but calligraphy_route_pcb is explicitly declared an alias of calligraphy_compile_board, so two tools do the same thing. The payment surface is also crowded: a Stripe URL returned by compile, calligraphy_create_coinbase_checkout, and calligraphy_verify_stablecoin_payment overlap in purpose, forcing an agent to reason about which checkout path to take. Descriptions are verbose enough to recover, but the boundaries are not self-evident.

    Naming Consistency4/5

    Everything is snake_case with a verb_noun shape, which is easy to read. The deviation is the two-family split: local utilities use bare verb prefixes (analyze_, calculate_, audit_) while the commercial flow is uniformly calligraphy_-prefixed, and calligraphy_route_pcb does not match the verb used by its own alias target compile_board. Minor, but it slightly breaks the predictable pattern.

    Tool Count4/5

    Fifteen tools is a reasonable scope for a PCB analysis plus fab-compile/payment pipeline, and each of the analysis and lifecycle tools earns its place. The one redundant slot is the route_pcb alias, which inflates the count without adding capability.

    Completeness4/5

    The commercial lifecycle is well covered end to end: quote, compile, job status, three payment routes, bundle download, B2B invoice, vault purge, and rate-limit escalation, plus local KiCad/Specctra analysis, impedance, and DFM checks. Gaps are minor — no explicit cancel/refund or re-issue tool, and local analysis supports only KiCad and Specctra despite upload support for Altium/Allegro/tscircuit. Agents can work around these, but they are genuine dead ends.

    Maintenance

    ActivityMaintained
    ResponsivenessNo recent community issues

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