vibe-hardware-mcp
# Vibe-Coding Hardware MCP Server (`vibe-hardware-mcp`)
[](https://glama.ai/mcp/servers/calligraphysystems/vibe-hardware-mcp)
> **A zero-dependency Python 3 Model Context Protocol (`MCP`) server (`calligraphy_mcp_stdio.py`) for local KiCad `.kicad_pcb` & Specctra `.dsn` parsing, PCB transmission-line impedance & IPC-2152 current calculation, local Design-for-Manufacturing (DFM) rule auditing, and multi-layer PCB trace routing.**
---
## Architecture & Included MCP Tools (`calligraphy_mcp_stdio.py`)
This repository contains the complete, zero-dependency Python 3 MCP server implementation in [`calligraphy_mcp_stdio.py`](./calligraphy_mcp_stdio.py) (containerized via [`Dockerfile`](./Dockerfile)):
### 1. Local Offline PCB Analysis, Impedance & DFM Tools (100% Local Execution)
| Tool Name | Execution | Description |
| :--- | :---: | :--- |
| **`analyze_kicad_pcb`** | **Local Python** | Parses `.kicad_pcb` S-expression files locally to extract copper layer stackup (`F.Cu`, `B.Cu`, `In1.Cu`..), board outline dimensions (`Edge.Cuts` in `mm`), footprint count, SMD/THT pad counts, fine-pitch (`<= 0.50 mm`) pad density, netlist count, and routed track/arc/via statistics. |
| **`analyze_specctra_dsn`** | **Local Python** | Parses Specctra `.dsn` autorouter files locally to extract units, resolution, signal/power layers, board boundary dimensions, component pin count, net connectivity, and design rule clearances/widths. |
| **`calculate_pcb_trace_impedance`** | **Local Python** | Closed-form IPC-2141A / Hammerstad-Jensen microstrip & stripline characteristic impedance ($Z_0$), edge-coupled differential pair impedance ($Z_{\text{diff}}$), propagation delay (`ps/mm`), and IPC-2152 DC current capacity / temperature-rise solver. |
| **`audit_pcb_dfm_rules`** | **Local Python** | Audits `.kicad_pcb` and `.dsn` trace widths, clearances, via drill diameters, and annular rings locally against `standard_2l`, `standard_4l`, and `fine_hdi` fabrication limits (JLCPCB / PCBWay). |
| **`calligraphy_list_gallery_boards`** | **Local Python** | Returns the built-in catalog of 13 verified open-source reference PCBs (`100.0%` routed completion, `0` native KiCad copper DRC violations). |
### 2. Optional Cloud Co-Processor Tools (Multi-Layer 3D PCB Routing Offload)
For dense multi-layer boards that require full 3D trace routing, `G1` circular arc smoothing, teardrop pad reinforcement, and turnkey Gerber/Excellon/IPC-D-356 `.ZIP` generation, the server also exposes optional co-processor tools (`calligraphy_preflight_audit`, `calligraphy_compile_board`, `calligraphy_get_job_status`, `calligraphy_download_fab_bundle`, `calligraphy_route_pcb`).
---
## Quick Start (Local `stdio` & Docker)
### Option 1: Run Locally via Python 3 (`stdio` Transport)
No external pip packages are required (uses Python 3.10+ standard library):
```json
{
"mcpServers": {
"vibe-hardware-mcp": {
"command": "python3",
"args": ["/path/to/vibe-hardware-mcp/calligraphy_mcp_stdio.py"]
}
}
}
```
### Option 2: Run via Docker (`Dockerfile`)
```bash
docker build -t vibe-hardware-mcp .
docker run -i --rm vibe-hardware-mcp
```
### Option 3: Remote Streamable-HTTP Endpoint (Claude Code / Cursor)
```bash
claude mcp add --transport http calligraphy-eda https://calligraphyeda.com/api/v1/mcp
```
---
## Visual Proof: `100.0%` Routed Copper + 3D Raytraced Boards (`0` Native KiCad DRC Errors)
| Benchmark Board | 350-DPI Routed Copper Proof (`0` DRC) | 3D Raytraced Assembly Render |
| :--- | :---: | :---: |
| **`Karabas-Nano` (2-Layer, `738` Pads, `928` Connections)**<br>`100.0%` Completion • `0` Unconnected • `0` KiCad DRC |  |  |
| **`Decelerator4030` (`908` Pads, `487` Connections, Off-Axis `45°` `LQFP-100`)**<br>`100.0%` Completion • `0` Unconnected • `0` KiCad DRC |  |  |
| **`Teensy MCU Breakout` (High-Density Through-Hole + SMD)**<br>`100.0%` Completion • `0` Unconnected • `0` KiCad DRC |  |  |
---
## License
MIT License — Copyright (c) 2026 **Calligraphy Systems LLC** ([https://calligraphyeda.com](https://calligraphyeda.com)).
TDQS
Scored across 15 tools
Most tools have clearly distinct roles (local analysis vs. DFM audit vs. impedance calc vs. job/payment lifecycle), but calligraphy_route_pcb is explicitly declared an alias of calligraphy_compile_board, creating a genuine duplicate entry an agent could misselect. There is also soft overlap between calligraphy_preflight_audit and analyze_kicad_pcb (both ingest the same file modes and inspect readiness), and between calligraphy_lookup_b2b_invoice and calligraphy_get_job_status.
All names are snake_case with a verb-first construction (analyze_, calculate_, audit_, calligraphy_compile_board, calligraphy_get_job_status), and the calligraphy_ prefix cleanly marks the hosted service namespace versus local tools. Minor deviations: calligraphy_preflight_audit is noun-noun rather than verb_noun, and the 'pcb' token floats inconsistently (analyze_kicad_pcb vs audit_pcb_dfm_rules vs calligraphy_route_pcb).
15 tools sits at the top of the comfortable range and each maps to a real step: local analysis, impedance/DFM checks, compile, status, payment (Stripe/Coinbase/stablecoin), download, invoice, purge, whitelist. The only clearly unearned slot is the redundant calligraphy_route_pcb alias, making it slightly bloated for the underlying workflow.
The surface covers a full lifecycle: input parsing (KiCad, Specctra), local physics/DFM analysis, compile/route, job status polling, three payment paths (Stripe checkout URL, Coinbase/x402, stablecoin tx verification), artifact download, invoicing, and vault destruction. Only marginal gaps exist (no job cancellation/refund or multi-job listing), which agents can work around via job_id status calls.