Enables AI assistants to perform Electronic Design Automation (EDA) tasks including Verilog synthesis, simulation, ASIC design flows, and waveform analysis through a unified interface.
Local MCP server for querying VCD waveform files via SQLite; enables AI agents to ask precise questions about signal values, transitions, and clock cycles without dumping raw VCD text.
An MCP server that provides AI assistants with a persistent, sandboxed Python environment for waveform analysis, enabling loading and manipulation of VCD/FST/FSDB files and temporal pattern matching.
An MCP server for reading and querying FSDB waveform files, enabling AI assistants to browse hierarchy, search signals, and extract waveform data with value changes.
Enables RTL simulation and hardware verification with Verilator through automatic testbench generation, natural language queries about simulations, waveform analysis, and protocol-aware testing for Verilog/SystemVerilog designs.
