cst_pcb_siw_waveguide
Creates a substrate integrated waveguide (SIW) in CST Studio with via fences and copper planes, computing cutoff frequency and guided wavelength from design parameters.
Instructions
Create a Substrate Integrated Waveguide (SIW) in CST Studio. Generates top and bottom copper planes with two rows of via fences forming the waveguide sidewalls. Calculates effective width, cutoff frequency, and guided wavelength using Cassivi et al. formulas.
Input Schema
TableJSON Schema
| Name | Required | Description | Default |
|---|---|---|---|
| name | Yes | Name for the SIW structure | |
| layer | Yes | Layer name (e.g. 'Top') | |
| x_start | No | X coordinate of the SIW start in mm | |
| y_start | No | Y coordinate of the SIW start in mm | |
| width_mm | Yes | SIW width (center-to-center of via rows) in mm | |
| component | No | CST component name | PCB |
| epsilon_r | No | Substrate relative permittivity | |
| height_mm | No | Substrate height in mm | |
| length_mm | Yes | SIW length in mm | |
| via_pitch_mm | Yes | Center-to-center via spacing along the length in mm | |
| via_diameter_mm | Yes | Via drill diameter in mm |