cst_pcb_via_model
Model PCB vias in CST Studio to estimate parasitic inductance and capacitance using Goldfarb inductance model and simplified capacitance formula.
Instructions
Create a detailed PCB via model in CST Studio with parasitic inductance and capacitance estimates. Uses the Goldfarb model for via inductance and a simplified capacitance formula.
Input Schema
| Name | Required | Description | Default |
|---|---|---|---|
| x | Yes | Via X position in mm | |
| y | Yes | Via Y position in mm | |
| name | Yes | Via name for the CST model | |
| component | No | CST component name | PCB |
| end_layer | Yes | Name of the ending (bottom) layer | |
| epsilon_r | No | Substrate relative permittivity | |
| start_layer | Yes | Name of the starting (top) layer | |
| pad_diameter_mm | Yes | Annular pad diameter in mm | |
| barrel_plating_um | No | Barrel plating thickness in micrometers | |
| drill_diameter_mm | Yes | Drill hole diameter in mm | |
| board_thickness_mm | No | Board thickness in mm | |
| antipad_diameter_mm | Yes | Antipad (clearance) diameter in mm |