CadenceAI MCP
Click on "Deploy Server".
Wait a few minutes for the server to deploy. Once ready, it will show a "Started" state.
In the chat, type
@followed by the MCP server name and your instructions, e.g., "@CadenceAI MCP run a PSpice simulation of my RC low-pass filter and show the measurements"
That's it! The server will respond to your query, and you can continue using it as needed.
Here is a step-by-step guide with screenshots.
CadenceAI MCP — Cadence EDA Tools for AI Assistants
A Model Context Protocol (MCP) server that exposes Cadence EDA tools (OrCAD Capture, Allegro PCB Designer, PSpice) to AI assistants like Claude, Cursor, and Cline — letting them browse PCBs, generate schematics, and run circuit simulations through a single, license-free, cross-platform interface.
✨ Features
Domain | What AI can do |
Environment | Auto-detect SPB installation, license status, available batch commands |
PCB files | Find |
Batch CLI | Invoke 60+ safe |
Schematics | Generate SPICE netlists, |
Simulation | Generate circuits from templates, run via PSpice / ngspice / analytical fallback |
Netlist flow | DSL → SPICE → Allegro tel-format in one end-to-end pipeline |
13 MCP tools, 75+ Allegro batch subcommands wrapped with safety allow-list, 6 circuit templates, all available out of the box.
Related MCP server: KiCAD MCP Server
🚀 Quick Start
1. Install
git clone https://github.com/cadenceai/cadence-mcp.git
cd cadence-mcp
pip install -e .2. Probe your environment
python -m cadence_mcp.server --probe{
"cds_root": "C:\\Cadence\\SPB_23.1",
"allegro_batch": "C:\\Cadence\\SPB_23.1\\tools\\bin\\allegro_batch.exe",
"pspice_exe": "C:\\Cadence\\SPB_23.1\\tools\\bin\\pspice.exe",
"license_present": false,
"batch_commands_count": 75,
...
}3. Register in your MCP client (e.g. Cursor / Claude Desktop)
Edit ~/.cursor/mcp.json:
{
"mcpServers": {
"cadence": {
"command": "python",
"args": ["-m", "cadence_mcp.server"],
"cwd": "D:\\AIBench\\CadenceAI"
}
}
}Restart the client. AI now has 13 Cadence tools at its disposal.
🛠 The 13 Tools
Environment & Diagnostics
Tool | Purpose |
| Detect SPB install, license, batch commands |
| Dump CDSROOT / CDS_LIC_FILE / LM_LICENSE_FILE |
| List all available Allegro batch subcommands |
| List the 56 commands safe to invoke |
PCB Design
Tool | Purpose |
| Recursively find |
| Extract readable strings from binary |
| Run one batch subcommand (timeout + allow-list) |
Schematic & Netlist
Tool | Purpose |
| From template or DSL → SPICE netlist file |
| Decompose DSL into components / directives |
| OrCAD Capture-compatible |
| SPICE → Allegro |
Simulation
Tool | Purpose |
| Enumerate 6 circuit templates (RC, RLC, diode, ...) |
| Auto-route to PSpice / ngspice + extract measurements |
📐 Architecture
┌──────────────────────────┐
AI Client ───► │ MCP Server (stdio) │
(Claude / │ 13 tools │
Cursor) │ │
└────────────┬─────────────┘
│
┌───────────────────────┼─────────────────────────┐
│ │ │
▼ ▼ ▼
┌──────────────┐ ┌──────────────────┐ ┌──────────────┐
│ env_detect │ │ simulator │ │ schematic │
│ pcb.py │ │ (PySpice/PSpice)│ │ pcb.py │
│ (read-only) │ │ │ │ (text gen) │
└──────────────┘ └──────────────────┘ └──────────────┘
│ │ │
▼ ▼ ▼
Allegro .brd PSpice / ngspice Allegro netin
files / dirs binary backend physical netlistThree independent modules + one MCP server bootstrap. No monolithic controller, no hidden state beyond an env cache.
🧪 Testing
python tests/test_all.pyCovers 10 scenarios end-to-end:
TEST 1: 环境探测 [OK] CDSROOT 已识别, 75+ batch commands
TEST 2: Allegro .brd 扫描 [OK] 找到 N 个 .brd 文件
TEST 3: SPICE 网表生成 [OK] .TRAN / .END / 文件已保存
TEST 4: 电路 DSL 解析 [OK] 识别元件、控制指令
TEST 5: 生成 OrCAD DSN 文本 [OK] XML 写入成功
TEST 6: SPICE → Allegro 转换 [OK] 包含 R1 / C1 等 refdes
TEST 7: 安全命令清单 [OK] 56+ 命令白名单
TEST 8: allegro_batch help 调用 [OK] exit=0
TEST 9: MCP 工具注册表 [OK] 13 tools / 13 handlers
TEST 10: 端到端电路设计流程 [OK] .cir / .tel / .dsn 全部产出Live MCP demo
For a real MCP-protocol walkthrough (spawns the server, calls every tool via JSON-RPC stdio, shows actual outputs and writes real files):
python demo_mcp_live.pyExpected outcome: all 14 tasks succeed; produces _demo_rc.cir,
_demo_div.cir, _demo_step.cir, _demo_rc.tel, _demo_amp.dsn in
examples/.
For just the simulation numeric results without MCP overhead:
python demo_summary.py🧩 End-to-End Example
Tell your AI assistant:
"Design a low-pass RC filter with fc=160 Hz and simulate it."
The AI calls, in order:
1. cadence_probe # learn environment
2. list_simulation_templates # see what's available
3. generate_spice_netlist # template=rc_lowpass, fc≈160Hz
4. run_circuit_simulation # execute on PSpice/ngspice
5. netlist_to_allegro # convert for PCB layout
6. allegro_batch_run subcommand=netin # import into AllegroOutput flow:
ai_design.cir PSpice/ngspice → ai_design.out (measurements)
ai_design.tel SPICE → Allegro → ready for `allegro_batch netin`
ai_design.dsn OrCAD Capture → optional: hand-edit in Capture🔧 Simulation Backends
The server auto-selects the best available backend in this order:
Priority | Backend | Requirements |
1 |
| PSpice on PATH + valid license |
2 |
|
|
3 |
| Built-in numpy solver for RC / divider / step (no deps) |
4 |
| Closed-form R1+R2 voltage divider |
Auto-skip behavior: if cadence_probe reports license_present: false,
the server skips PSpice automatically (avoids the 60s timeout) and
goes straight to the analytical fallback. So you get instant simulation
results even without any license.
Tested backends:
PSpice binary present at
C:\Cadence\SPB_23.1\tools\bin\pspice.exe;-bmode requires an active license. When license is missing, server falls back gracefully.ngspice is the recommended open-source fallback. Download from https://ngspice.sourceforge.io/download.html and put
ngspice.exeon PATH. (On some networks SourceForge blocks direct downloads; try MSYS2mingw-w64-ucrt-x86_64-ngspiceinstead.)PySpice 1.5 Python wrapper is auto-detected (
pyspice_available: true).Analytical fallback (numpy only) — solves RC low/high-pass, step response, and voltage dividers in closed form / closed-form-plus-numerical. Always available, no external binaries required.
Demonstrated simulation results (no license required)
Run python demo_summary.py:
RC 低通滤波器 (rc_lowpass) Vout_peak=4.36V tau=100μs fc=1.59kHz
RC 高通滤波器 (rc_highpass) Vout_peak=4.36V tau=100μs fc=1.59kHz
RC 阶跃响应 (rc_step) Vout_end=0.48V tau=10ms fc=15.9Hz
电压分频器 (voltage_divider) Vout=8.0V (Vin=12V, R1=1k, R2=2k)🛡 Security & Sandboxing
All external commands run through
subprocess.runwith hard timeout.allegro_batch_runenforces a 56-command allow-list unlessallow_unsafe=trueis explicitly set.File I/O paths are normalised; netlist files are written with ASCII encoding to avoid encoding edge cases.
No network calls; pure local execution.
License state is reported (
license_present: false/true) but never assumed.
📚 Reference: Useful Allegro Batch Subcommands
Selected from the 75+ available:
Command | Purpose |
| Generate Gerber photoplot files |
| Import netlist into board |
| Forward-annotate schematic changes |
| Generate design reports (DRC, BOM, etc.) |
| Extract padstacks, symbols, devices from board |
| Convert |
| Convert Gerber format versions |
| IPC-2581 manufacturing data exchange |
| ODB++ manufacturing data exchange |
| DFM web extraction for fabrication |
| Performance / signal-integrity reports |
| Quantus verification extraction |
| Component placement (constraint-driven) |
| Component / pin swap |
Run allegro_batch.exe help on your machine to get the full list.
🤝 Contributing
PRs should:
Run
python tests/test_all.pycleanly (no failures).Add tests for any new tool.
Update this README's tool table.
Keep the allow-list curated — every batch command added must be safe.
📄 License
MIT — see LICENSE.
🔗 Related Projects
allegro-mcp — read-only MCP for
.brdfiles (MIT, 4 stars).skill-script-generator — NL → SKILL script generator.
Python-Skill Bridge — Python ↔ Virtuoso SKILL bridge.
mcp4eda.cn — Chinese EDA MCP hub (no Cadence entries yet).
CadenceAI MCP is the first combined schematic + PCB + simulation MCP for the Cadence SPB toolchain.
Available Tools
13 toolsallegro_batch_commandsA
列出 Allegro batch 支持的所有命令 (75+ 条).可用于了解 Allegro 批处理能力,挑选合适的工具做 Gerber 转换、网表导入、库导出、光绘生成等。
Inputs: no named parameters.
allegro_batch_runB
执行单个 allegro_batch 子命令 (如 artwork / netin / dump_libraries / report / brd2dml 等)。带白名单 (60+ 安全命令) 和超时保护,默认禁止高危操作。
Inputs: subcommand (required), args, timeout, allow_unsafe.
cadence_env_varsA
返回当前进程可见的 Cadence 相关环境变量快照(CDSROOT / CDS_LIC_FILE / LM_LICENSE_FILE 等)。用于诊断 license / 路径配置问题。
Inputs: no named parameters.
cadence_probeA
探测系统中的 Cadence EDA 工具链可用性,返回 SPB 根目录、可执行文件、license 状态、PSpice 模型库路径、Allegro 批处理命令清单等。这是新会话的第一调用,了解环境。
Inputs: cds_root.
find_brd_filesB
在指定根目录递归查找 Cadence Allegro PCB 文件 (.brd)。返回带元数据 (大小、估计层数、器件数) 的列表。
Inputs: root (required), glob, max_results.
generate_schematic_dsnB
基于组件与网络清单生成 OrCAD Capture 兼容的简化 .DSN 工程文本(纯 XML)。适合作为 AI 原理图设计的中间产物,再导入 Capture 进行后处理。
Inputs: nets (required), components (required), title, save_path, +1 more.
generate_spice_netlistC
基于模板 (rc_lowpass / rc_highpass / rlc_bandpass / voltage_divider / diode_rectifier / rc_step_response) 或直接 DSL 生成 PSpice / ngspice 兼容的电路网表,并保存到指定路径。
Inputs: template, save_path, custom_dsl, parameters.
list_simulation_templatesB
列出所有可用的电路仿真模板及默认参数,方便 AI 选型。
Inputs: no named parameters.
netlist_to_allegroA
把 SPICE 网表转换成 Allegro netin 接受的简化物理网表 (.tel 风格)。适合 netin 工具的预处理步骤。
Inputs: spice_netlist (required), save_path.
parse_brd_fileA
从 .brd 文件中提取可读字符串片段,作为 PCB 设计的轻量级上下文(层、器件、网络、规则等)。适合作为 AI 摘要的输入,不能替代完整 Allegro DB 解析。
Inputs: brd_path (required), max_bytes.
parse_circuit_dslB
把类 SPICE DSL 文本解析为结构化数据 (组件清单、节点、控制指令),便于 AI 理解电路结构。
Inputs: dsl (required).
run_circuit_simulationA
执行电路仿真。自动选择后端:1) 找到 pspice.exe 就用 PSpice (Cadence 默认需 license);2) 否则尝试 ngspice CLI;3) 都没有就只返回网表 + 安装提示。返回 measurements (峰值/平均/RMS) 与 trace 名称。
Inputs: netlist (required), analysis, work_dir, prefer_pspice.
safe_batch_commandsA
返回 allegro_batch 的白名单命令列表(无需 GUI license 即可使用的安全子命令)。
Inputs: no named parameters.
Tool Schema Changelog
Recent tool additions, removals, and schema changes observed during successful MCP inspections.
Loading tool schema changelog…
TDQS
Scored across 13 tools
Most tools target distinct actions/resources (parse, find, run, generate), but cadence_probe vs cadence_env_vars and allegro_batch_commands vs safe_batch_commands have overlapping diagnostic/listing purposes. Descriptions clarify the differences, so an agent can usually disambiguate.
All names use snake_case, which is consistent. However, the set mixes verb_noun patterns (parse_circuit_dsl, generate_spice_netlist) with noun phrases (cadence_probe, allegro_batch_commands), so it is not a perfect single convention.
13 tools is well within the ideal 3-15 range for a specialized EDA assistant. Each tool appears to cover a distinct step in the Cadence workflow, from discovery to simulation.
The surface covers environment probing, file discovery, DSL/netlist generation, batch execution, and simulation. Minor gaps remain around direct .brd mutation and deeper Allegro database editing, but core AI-assisted workflows are supported.
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