Generate device tree source (.dts) file from schematic.

This function analyzes a KiCad schematic and generates a device tree source file compatible with the specified SOC family.

Extract GPIO pin configurations from schematic.

Extract I2C bus and device configurations.

Extract SPI bus and device configurations.

Extract power domain and regulator configurations.

Validate pin configuration conflicts for device tree generation.

This function validates that the pin configuration is suitable for device tree generation and reports any conflicts or issues.

Trace component connections across hierarchical schematics.

This tool traces connections through the entire schematic hierarchy, including sub-sheets, to show complete signal paths.

Analyze all nets in hierarchical schematic design.

This tool analyzes network connections across the entire hierarchy, showing how signals flow between main schematic and sub-sheets.

Generate KiCad netlist from schematic file.

Trace component connections using netlist file (most accurate).

Get all nets from netlist file.

Get all components from netlist with their network connections.

List all footprints in a KiCad PCB file.

Get statistics about a KiCad PCB design.

Analyze nets in a KiCad PCB file.

Provides track width distribution, via distribution, per-net track length ranking, layer coverage, and design rule comparison.

Find track segments belonging to a specific net.

Analyze signal integrity: diff pair matching, RF traces, critical nets.

Auto-detects differential pairs (e.g., USB_N/USB_P, DP/DN) and checks length matching. Reports RF trace dimensions and longest signal nets.

Analyze power integrity: copper zones, power net routing, GND coverage.

Initialize PCB layout with specified dimensions.

Creates a .kicad_pcb file with the specified size based on the schematic. The PCB will be initialized with:

• Specified dimensions

• Default grid settings

• Default layers

• Standard design rules

Export PCB to Gerber format for manufacturing.

Gerber files are required for PCB fabrication. This tool generates all necessary Gerber files including:

• Copper layers (F.Cu, B.Cu)

• Solder mask layers

• Silkscreen layers

• Edge cuts (board outline)

• Drill files

Analyze pin functions and detect conflicts.

This function analyzes schematic to determine pin functions by:

• Examining net names to infer functionality

• Identifying MCU components and their pin mappings

• Detecting potential pin conflicts

Detect pins with conflicting electrical connections.

This function checks for:

• Multiple outputs on same net

• Power-to-power connections

• Unconnected input pins

• Pin type mismatches

Extract pin multiplexing configuration for MCUs.

This function extracts pin multiplexing (pinmux) configuration for MCU components, showing which peripherals are assigned to which pins.

Create a complete KiCad 9.0+ project by copying KiCad's template.

This method copies a KiCad template project and modifies it, ensuring 100% compatibility with KiCad 9.0+.

List all components in a KiCad schematic file.

Get detailed information about a specific symbol/component.

Search for symbols/components matching a pattern.

List all nets in a KiCad schematic.

Get general information about a schematic file.

Add a component from KiCad's built-in library to the schematic.

Add a wire (connection line) to the schematic.

Add a local label (text label) to the schematic.

Search for components by type (OLED, sensor, display, etc.).

This tool intelligently searches for components by their type, value, footprint, or network connections to identify specific component categories.

Run Electrical Rules Check (ERC) on schematic.

Checks for:

• Unconnected pins

• Power conflicts

• Multiple outputs on same net

• Pin type mismatches

Run Design Rules Check (DRC) on PCB.

Checks for:

• Clearance violations

• Track spacing violations

• Missing connections

• Pad/footprint overlaps

• Board edge constraints

Get filtered ERC violations from schematic.

Get filtered DRC violations from PCB.

Export ERC report to file.

Export DRC report to file.