Enables AI assistants to drive Xilinx Vivado, Intel Quartus, and Anlogic TangDynasty for FPGA development, including project creation, synthesis, implementation, timing closure, and hardware programming through natural language.
Wraps Quartus II 9.1 command-line tools into MCP tools, enabling AI agents to create projects, assign pins, generate simulation waveforms, run simulations, compile, read reports, and program devices.
MCP server for AMD Xilinx Vivado 2023.1 that enables Claude Code to act as an AI FPGA engineer, providing 27 tools for querying, building, simulating, and programming FPGA designs.
Enables natural language interaction with Cadence Virtuoso SKILL via Claude Code, allowing users to load files, evaluate expressions, inspect forms, and read CIW errors.
